MAX11661 Datasheet, PDF (10/28 Pages) Maxim Integrated Products – 500ksps, Low-Power, Serial 12-/10-/8-Bit ADCs

500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11663) (continued)
(VDD = 2.2V to 3.6V. fSCLK = 8MHz, 50% duty cycle, 500ksps. CDOUT = 10pF, TA = -40NC to +125NC, unless otherwise noted. Typical
values are at T_A = +25NC.)
PARAMETER
DIGITAL OUTPUT (DOUT)
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output High Voltage
VOH
ISOURCE = 200µA
0.85 x
V_VDD
V
Output Low Voltage
V_OL
ISINK = 200µA
0.15 x
V_VDD
V
High-Impedance Leakage
Current
I_OL
Q1.0
FA
High-Impedance Output
Capacitance
COUT
4
pF
POWER SUPPLY
Positive Supply Voltage
Positive Supply Current
(Full-Power Mode)
VDD
I_VDD
VAIN = GND
2.2
3.6
V
1.76
mA
Positive Supply Current
(Full-Power Mode), No Clock
IVDD
1.48
mA
Power-Down Current
I_PD
Line Rejection
TIMING CHARACTERISTICS (Note 1)
Quiet Time
tQ
CS Pulse Width
t1
CS Fall to SCLK Setup
t2
CS Falling Until DOUT High-
Impedance Disabled
t₃
Leakage only
VDD = 2.2V to 3.6V
(Note 2)
1.3
10
FA
0.17
LSB/V
4
ns
10
ns
5
ns
1
ns
Data Access Time After SCLK
Falling Edge
t₄
Figure 2, VDD = 2.2V to 3.6V
15
ns
SCLK Pulse Width Low
SCLK Pulse Width High
Data Hold Time From SCLK
Falling Edge
t₅
Percentage of clock period
t6
Percentage of clock period
t₇
Figure 3
40
60
%
40
60
%
5
ns
SCLK Falling Until DOUT High
Impedance
t₈
Figure 4 (Note 2)
2.5
14
ns
Power-Up Time
Conversion cycle
1
Cycle
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