MAX1108 Datasheet, PDF (6/20 Pages) Maxim Integrated Products – Single-Supply, Low-Power, 2-Channel, Serial 8-Bit ADCs

Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS—MAX1109 (continued)
(V_DD = +4.5V to +5.5V; unipolar input mode; COM = GND, f_SCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion
cycle (50ksps); 1µF capacitor at REF, external +4.096V reference at REF; T_A = T_MIN to T_MAX; unless otherwise noted. Typical values
are at T_A = +25°C.)
PARAMETER
POWER REQUIREMENTS
Supply Voltage
SYMBOL
V_DD
CONDITIONS
MIN TYP MAX UNITS
4.5
5
5.5
V
Supply Current (Notes 2, 8)
V_DD = 4.5V to 5.5V, _{Internal reference}
C_L = 10pF,
I_{DD full-scale input}
External reference
130
250
µA
95
µA
Power down, V_DD = 4.5V to 5.5V
0.5
2.5
Power-Supply Rejection (Note 9) PSR
DIGITAL INPUTS (DIN, SCLK, and CS)
Threshold Voltage High
V_IH
Threshold Voltage Low
V_IL
Input Hysteresis
V_HYST
Input Current High
I_IH
Input Current Low
I_IL
Input Capacitance
C_IN
DIGITAL OUTPUT (DOUT)
External reference = +4.096V,
full-scale input, V_DD = 4.5V to 5.5V
±0.4
±4
mV
3
V
0.8
V
0.2
V
±1
µA
±1
µA
15
pF
Output High Voltage
V_OH I_SOURCE = 0.5mA
Output Low Voltage
I_SINK = 5mA
V_OL
I_SINK = 16mA
Three-State Leakage Current
Three-State Output Capacitance
I_L
C_OUT
CS = V_DD
CS = V_DD
TIMING CHARACTERISTICS (Figures 8, 9, and 10)
V_DD - 0.5
V
0.4
V
0.8
±0.01 ±10
µA
15
pF
Acquisition Time
DIN to SCLK Setup Time
DIN to SCLK Hold Time
SCLK Fall to Output Data Valid
CS Fall to Output Enable
CS Rise to Output Disable
t_ACQ
t_DS
t_DH
t_DO
t_DV
t_TR
Figure 1, C_LOAD = 100pF
Figure 1, C_LOAD = 100pF
Figure 2, C_LOAD = 100pF
1.0
µs
100
ns
0
ns
20
200
ns
240
ns
240
ns
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