MAX11301 Datasheet, PDF (40/55 Pages) Maxim Integrated Products – Programmable Sample Averaging Per ADC Port

MAX11301
PIXI, 20-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
GPI IRQ Mode Registers (Read/Write)
BIT
1:0
3:2
5:4
7:6
9:8
11:10
13:12
15:14
1:0
3:2
5:4
7:6
9:8
11:10
13:12
15:14
1:0
3:2
5:4
7:6
FIELD NAME
GPIMD_0[1:0]
GPIMD_1[1:0]
GPIMD_2[1:0]
GPIMD_3[1:0]
GPIMD_4[1:0]
GPIMD_5[1:0]
GPIMD_6[1:0]
GPIMD_7[1:0]
GPIMD_8[1:0]
GPIMD_9[1:0]
GPIMD_10[1:0]
GPIMD_11[1:0]
GPIMD_12[1:0]
GPIMD_13[1:0]
GPIMD_14[1:0]
GPIMD_15[1:0]
GPIMD_16[1:0]
GPIMD_17[1:0]
GPIMD_18[1:0]
GPIMD_19[1:0]
DESCRIPTION
GPI interrupt request mode for ports 0 to 19
• Each input port is controlled by GPIMD, a 2-bit code.
• For a given port i (0≤i≤19):
• GPIMD_i[1:0] = 00: GPIST[i] is never asserted
• GPIMD_i[1:0] = 01: GPIST[i] is asserted upon detection of a positive edge
• GPIMD_i[1:0] = 10: GPIST[i] is asserted upon detection of a negative edge
• GPIMD_i[1:0] = 11: GPIST[i] is asserted upon detection of a positive or a negative edge
Device Control Register (Read/Write)
BIT
FIELD NAME
DESCRIPTION
1:0
ADCCTL[1:0]
ADC conversion mode selection
• 00: Idle mode – The ADC does not perform any conversion.
• 01: Single sweep – The ADC performs one conversion for each of the ADC-configured ports
sequentially. The assertion of CNVT triggers the single sweep. The sweep starts with the ADC-
configured port of lowest index and stops with the ADC-configured port of highest index.
• 10: Single conversion – The ADC performs one conversion for the current port. It starts with
the lowest index port that is ADC-configured, and it progresses to higher index ports as CNVT
is asserted.
• 11: Continuous sweep – This mode is not controlled by CNVT. The ADC continuously sweeps
the ADC-configured ports.
3:2
DACCTL[1:0]
DAC mode selection
• 00: Sequential update mode for DAC-configured ports.
• 01: Immediate update mode for DAC-configured ports. The DAC-configured port that received
new data is the next port to be updated. After updating that port, the DAC- configured port
update sequence continues from that port onward. A minimum of 80µs must be observed
before requesting another immediate update.
• 10: All DAC-configured ports use the same data stored in DACPRSTDAT1[11:0].
• 11: All DAC-configured ports use the same data stored in DACPRSTDAT2[11:0].
5:4
ADCCONV[1:0] ADC conversion rate selection
• 00: ADC conversion rate of 200ksps (default)
• 01: ADC conversion rate of 250ksps
• 10: ADC conversion rate of 333ksps
• 11: ADC conversion rate of 400ksps
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