MAX11301 Datasheet, PDF (36/55 Pages) Maxim Integrated Products – Programmable Sample Averaging Per ADC Port

MAX11301
PIXI, 20-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
Register Detailed Description
Device ID Register (Read)
BIT FIELD NAME
15:0
DEVID[15:0]
Device ID
0001_0100_0010_0100
DESCRIPTION
Interrupt Register (Read)
BIT FIELD NAME
DESCRIPTION
0
ADCFLAG
ADC flag interrupt
• Asserted when the ADC completes a conversion (ADC set in single-conversion mode) or when
the ADC completes a sweep (ADC set in single-sweep or continuous-sweep mode).
• No interrupt is generated when the ADC is in idle mode.
• Cleared after the interrupt register is read.
1
ADCDR
ADC data ready interrupt
• Asserted when any ADC data register receives a new data sample. If a port is configured to
average 2^N samples, it takes 2^N sweeps for that port data register to be refreshed and assert
ADCDR.
• Data registers are refreshed either at the end of a conversion (ADC set in single-conversion
mode) or at the end of a sweep (ADC set in single-sweep or continuous-sweep mode).
• Cleared after the interrupt register is read, and after both ADCST[15:0] and ADCST[19:16]
registers are read subsequently.
2
ADCDM
ADC data missed interrupt
• Asserted when the host missed reading a port’s ADC data register by the time that port’s ADC
data register is overwritten by new data.
• Cleared after the interrupt register is read.
3
GPIDR
GPI event ready interrupt
• Asserted when a new event is captured by GPI-configured ports. The type of event is set by the
corresponding GPI IRQ mode register. The host can then consult GPIST[15:0] and GPIST[19:16]
registers to identify the port that caused the interrupt.
• Cleared after the interrupt register is read, and after both GPIST[15:0] and GPIST[19:16] are read
subsequently.
4
GPIDM
GPI event missed interrupt
• Asserted when the host missed reading the GPI status register by the time that register is
overwritten.
• Must be used in conjunction with GPIDR for proper operation.
• Cleared after the interrupt register is read, and after both GPIST[15:0] and GPIST[19:16] are read
subsequently.
5
DACOI
DAC driver overcurrent interrupt
• Asserted when the DAC driver current exceeds approximately 50mA. The host can then read
DACOIST[15:0] and DACOIST[19:16] to identify the port that caused the interrupt.
• Cleared after the interrupt register is read, and after both DACOIST[15:0] and DACOIST[19:16]
registers are read subsequently.
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