MAX1021 Datasheet, PDF (31/40 Pages) Maxim Integrated Products – 10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports

10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
Output-Data Format
Figures 6–9 illustrate the conversion timing for the
MAX1021/MAX1043. All 10-bit conversion results are out-
put in 2-byte format, MSB first, with four leading zeros
and the LSB followed by 2 sub-bits. Data appears on
DOUT on the falling edges of SCLK. Data is binary for
unipolar mode and two’s complement for bipolar mode
and temperature results. See Figures 3, 4, and 5 for
input/output and temperature-transfer functions.
ADC Transfer Functions
Figure 3 shows the unipolar transfer function for single-
ended or differential inputs. Figure 4 shows the bipolar
transfer function for differential inputs. Code transitions
occur halfway between successive-integer LSB values.
Output coding is binary, with 1 LSB = V_REF1 / 1024 for
unipolar and bipolar operation, and 1 LSB = +0.125°C
for temperature measurements. Bipolar true-differential
results and temperature-sensor results are available in
two’s complement format, while all others are in binary.
See Tables 6, 7, and 8 for details on which setting
(unipolar or bipolar) takes precedence.
In unipolar mode, AIN+ can exceed AIN- by up to
V_REF1. In bipolar mode, either input can exceed the
other by up to V_REF1 / 2.
Partial Reads and Partial Writes
If the first byte of an entry in the FIFO is partially read
(CS is pulled high after fewer than eight SCLK cycles),
the remaining bits are lost for that byte. The next byte of
data that is read out contains the next 8 bits. If the first
byte of an entry in the FIFO is read out fully, but the
second byte is read out partially, the rest of that byte is
lost. The remaining data in the FIFO is unaffected and
can be read out normally after taking CS low again, as
long as the 4 leading bits (normally zeros) are ignored.
If CS is pulled low before EOC goes low, a conversion
may not be completed and the FIFO data may not be
correct. Incorrect writes (pulling CS high before com-
pleting eight SCLK cycles) are ignored and the register
remains unchanged.
Applications Information
Internally Timed Acquisitions and
Conversions Using CNVST
ADC Conversions in Clock Mode 00
In clock mode 00, the wake-up, acquisition, conversion,
and shutdown sequence is initiated through CNVST
and performed automatically using the internal oscilla-
tor. Results are added to the internal FIFO to be read
out later. See Figure 6 for clock mode 00 timing after a
command byte is issued. See Table 5 for details on
programming the clock mode in the setup register.
Initiate a scan by setting CNVST low for at least 40ns
before pulling it high again. The MAX1021/MAX1043
then wake up, scan all requested channels, store the
results in the FIFO, and shut down. After the scan is
complete, EOC is pulled low and the results are avail-
able in the FIFO. Wait until EOC goes low before pulling
CS low to communicate with the serial interface. EOC
stays low until CS or CNVST is pulled low again. A tem-
perature-conversion result, if requested, precedes all
other FIFO results. Temperature results are available in
12-bit format.
Do not issue a second CNVST signal before EOC goes
low; otherwise, the FIFO can be corrupted. Wait until all
conversions are complete before reading the FIFO. SPI
communications to the DAC and GPIO registers are per-
mitted during conversion. However, coupled noise may
result in degraded ADC signal-to-noise ratio (SNR).
Externally Timed Acquisitions and
Internally Timed Conversions with CNVST
ADC Conversions in Clock Mode 01
In clock mode 01, conversions are requested one at a
time using CNVST and performed automatically using
the internal oscillator. See Figure 7 for clock mode 01
timing after a command byte is issued.
Setting CNVST low begins an acquisition, wakes up the
ADC, and places it in track mode. Hold CNVST low for
at least 1.4µs to complete the acquisition. If reference
mode 00 or 10 is selected, an additional 45µs is
required for the internal reference to power up. If a tem-
perature measurement is being requested, reference
power-up and temperature measurement is internally
timed. In this case, hold CNVST low for at least 40ns.
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