MAX1021 Datasheet, PDF (19/40 Pages) Maxim Integrated Products – 10-Bit, Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports

10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
Unipolar or Bipolar Conversions
Address the unipolar- and bipolar-mode registers
through the setup register (bits 1 and 0). See Table 5 for
the setup register. See Figures 3 and 4 for the transfer-
function graphs. Program a pair of analog inputs for
differential operation by writing a one to the appropriate
bit of the bipolar- or unipolar-mode register. Unipolar
mode sets the differential input range from 0 to V_REF1. A
negative differential analog input in unipolar mode caus-
es the digital output code to be zero. Selecting bipolar
mode sets the differential input range to ±V_REF1 / 2. The
digital output code is binary in unipolar mode and two’s
complement in bipolar mode.
In single-ended mode, the MAX1021/MAX1043 always
operate in unipolar mode. The analog inputs are inter-
nally referenced to AGND with a full-scale input range
from 0 to the selected reference voltage.
Analog Input (T/H)
The equivalent circuit of Figure 2 shows the ADC input
architecture of the MAX1021/MAX1043. In track mode,
a positive input capacitor is connected to AIN0–AIN7 in
single-ended mode and AIN0, AIN2, AIN4, and AIN6 in
differential mode. A negative input capacitor is con-
nected to AGND in single-ended mode or AIN1, AIN3,
AIN5, and AIN7 in differential mode. For external T/H
timing, use clock mode 01. After the T/H enters hold
mode, the difference between the sampled positive and
negative input voltages is converted. The input capaci-
tance charging rate determines the time required for
the T/H to acquire an input signal. If the input signal’s
AIN0–AIN7
(SINGLE-ENDED), ACQ
AIN0, AIN2,
AIN4, AIN6
(DIFFERENTIAL)
REF1
DAC
AGND
CIN+
HOLD
CIN-
AGND
(SINGLE-ENDED), ^ACQ
AIN1, AIN3,
AIN5, AIN7
(DIFFERENTIAL)
HOLD
ACQ
AV_DD / 2
COMPARATOR
HOLD
source impedance is high, the required acquisition time
lengthens.
Any source impedance below 300Ω does not signifi-
cantly affect the ADC’s AC performance. A high-imped-
ance source can be accommodated either by
lengthening t_ACQ (only in clock mode 01) or by placing
a 1µF capacitor between the positive and negative
analog inputs. The combination of the analog-input
source impedance and the capacitance at the analog
input creates an RC filter that limits the analog input
bandwidth.
Input Bandwidth
The ADC’s input-tracking circuitry has a 1MHz small-sig-
nal bandwidth, making it possible to digitize high-speed
transient events and measure periodic signals with
bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. Anti-alias prefiltering
of the input signals is necessary to avoid high-frequency
signals aliasing into the frequency band of interest.
Analog Input Protection
Internal electrostatic-discharge (ESD) protection diodes
clamp all analog inputs to AV_DD and AGND, allowing
the inputs to swing from (AGND - 0.3V) to (AV_DD +
0.3V) without damage. However, for accurate conver-
sions near full scale, the inputs must not exceed AV_DD
by more than 50mV or be lower than AGND by 50mV. If
an analog input voltage exceeds the supplies, limit the
input current to 2mA.
Internal FIFO
The MAX1021/MAX1043 contain a first-in/first-out
(FIFO) buffer that holds up to 16 ADC results plus one
temperature result. The internal FIFO allows the ADC to
process and store multiple internally clocked conver-
sions and a temperature measurement without being
serviced by the serial bus.
If the FIFO is filled and further conversions are request-
ed without reading from the FIFO, the oldest ADC
results are overwritten by the new ADC results. Each
result contains 2 bytes, with the MSB preceded by four
leading zeros. After each falling edge of CS, the oldest
available pair of bytes of data is available at DOUT,
MSB first. When the FIFO is empty, DOUT is zero.
The first 2 bytes of data read out after a temperature
measurement always contain the 10-bit temperature
result, preceded by four leading zeros, MSB first.
Figure 2. Equivalent Input Circuit
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