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| MAX1422 Datasheet, PDF (3/15 Pages) Maxim Integrated Products – 12-Bit, 20Msps, 3.3V, Low-Power ADC with Internal Reference | |||
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12-Bit, 20Msps, 3.3V, Low-Power ADC with
Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VDVDD = 3.3V, AGND = DGND = 0, VIN = ±1.024V, differential input voltage at -0.5dBFS, internal reference, fCLK = 20MHz (50%
duty cycle); digital output load CL = 10pF, â¥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Typical values are at TA = +25°C.)
PARAMETER
Common-Mode Input Voltage
Range (Note 5)
Differential Input Range
Small-Signal Bandwidth
Large-Signal Bandwidth
SYMBOL
CONDITIONS
VCMVR
VIN
BW-3dB
FPBW -3dB
VINP - VINN (Note 6)
(Note 7)
(Note 7)
Overvoltage Recovery
OVR 1.5 â FS input
INTERNAL REFERENCE (REFIN bypassed with 0.22µF in parallel with 1nF)
Common-Mode Reference
Voltage
VCML At CML
Positive Reference Voltage
VREFP At REFP
Negative Reference Voltage
VREFN At REFN
Differential Reference Voltage
VDIFF (Note 6)
Differential Reference
Temperature Coefficient
REFTC
EXTERNAL REFERENCE (VREFIN = 2.048V)
REFIN Input Resistance
RIN
(Note 8)
REFIN Input Capacitance
CIN
REFIN Reference Input Voltage
Range
VREFIN
Differential Reference Voltage
Range
VDIFF (Note 6)
EXTERNAL REFERENCE (VREFIN = 0, reference voltage applied to REFP, REFN, and CML)
REFP, REFN, CML Input Current
IIN
REFP, REFN, CML Input
Capacitance
CIN
Differential Reference Voltage
Range
VDIFF (Note 6)
CML Input Voltage Range
VCML
REFP Input Voltage Range
VREFP
REFN Input Voltage Range
VREFN
DIGITAL INPUTS (CLK, CLK, PD, OE)
Input Logic High
VIH
Input Logic Low
VIL
MIN TYP MAX UNITS
VCML
±5%
V
±VDIFF
V
400
MHz
150
MHz
1
Clock
cycles
VAVDD â 0.5
VCML
+ 0.512
VCML
- 0.512
1.024
±5%
±100
V
V
V
V
ppm/°C
5
kâ¦
10
pF
2.048
±10%
V
0.92 â
VREFIN/2
VREFIN/2
1.08 â
VREFIN/2
V
-200
200
µA
15
pF
1.024
±10%
V
1.65
±10%
V
VCML +
VDIFF/2
V
VCML -
VDIFF/2
V
0.7 â
VDVDD
V
0.3 â
VDVD
V
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