DS4M125 Datasheet, PDF (3/7 Pages) Maxim Integrated Products – 3.3V Margining Clock Oscillator with LVPECL/LVDS Output

3.3V Margining Clock Oscillator with
LVPECL/LVDS Output
ELECTRICAL CHARACTERISTICS (continued)
(V_CC = 3.135V to 3.465V, T_A = -40°C to +85°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
Input-Voltage Low (OE)
Input-Leakage High (OE)
Input-Leakage Low (OE)
Input-Leakage High (MS)
Input-Leakage Low (MS)
Input Voltage: High Level (MS)
SYMBOL
V_IL
I_LEAKH
I_LEAKL
I_LEAKH
I_LEAKL
CONDITIONS
(Note 5)
OE voltage = VCC
OE voltage = GND
MS voltage = VCC
MS voltage = GND
V_IH
(Note 5)
MIN TYP
0
-5
-20
20
-5
0.75 x
V_CC +
0.15V
MAX
0.3 x
V_CC
+5
-50
50
+5
UNITS
V
μA
μA
μA
μA
V_CC
V
Input Voltage: Mid Level (MS)
V_IM
(Note 5)
0.25 x
V_CC +
0.15V
0.75 x
V_CC -
V
0.15V
Input Voltage: Low Level (MS)
V_IL
(Note 5)
0.25 x
0
V_CC -
V
0.15V
LVDS
Output High Voltage
Output Low Voltage
Differential Output Voltage
Change in V_OD for
Complementary States
V_OH
V_OL
|V_OD|

|V_OD|
100 differential load (Notes 2, 5)
100 differential load (Notes 2, 5)
100 differential load
100 differential load
0.925
250
1.475
V
V
425
mV
25
mV
Offset Output Voltage
V_OS
100 differential load (Note 2)
1.125
1.275
V
Change in V_OS for
Complementary States

|V_OS|
100 differential load
150
mV
Differential Output Impedance
R_OLVDS
80
140

Output Current
L_VSSLVDSO
L_LVDSO
OUTN or OUTP shorted to ground and
measure the current in the shorting path
OUTN and OUTP shorted together and
measure the change in I_CC
40
mA
6.5
Output Rise Time (Differential)
Output Fall Time (Differential)
Duty Cycle
t_RLVDSO
t_FLVDSO
D_{CYCLE_LVDS}
20% to 80%
80% to 20%
175
ps
175
ps
45
55
%
Propagation Delay from OE Going
LOW to Logical 1 at OUTP
t_PA1
(Figure 2)
200
ns
Propagation Delay from OE Going
HIGH to Output Active
t_P1A
(Figure 2)
200
ns
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