MAX1219 Datasheet, PDF (16/21 Pages) Maxim Integrated Products – 1.8V, Dual, 12-Bit, 210Msps ADC for Broadband Applications

1.8V, Dual, 12-Bit, 210Msps ADC for
Broadband Applications
ADC FULL SCALE = REFTA/B - REFBA/B
REFTA/B
G
REFBA/B
REFERENCE
BUFFER
REFERENCE-
SCALING
AMPLIFIER
1V
REFA/B
MAX1219
CONTROL LINE
TO DISABLE
REFERENCE BUFFER
REFADJA/B
0.1µF
ADC FULL SCALE = REFTA/B - REFBA/B
REFTA/B
G
REFBA/B
REFERENCE
BUFFER
REFERENCE-
SCALING
AMPLIFIER
1V
13kΩ TO
1MΩ
MAX1219
CONTROL LINE
TO DISABLE
REFERENCE BUFFER
REFA/B
REFADJA/B
0.1µF
13kΩ TO
1MΩ
AV_CC
AV_CC / 2
AV_CC
AV_CC / 2
Figure 6a. Circuit Suggestions to Adjust the ADC’s Full-Scale Range
FS VOLTAGE vs. ADJUST RESISTOR
1.34
1.32
RESISTOR VALUE APPLIED BETWEEN
1.30
REFADJA/REFADJB AND REFA/REFB
INCREASES V_FS
1.28
1.26
1.24
1.22
1.20
RESISTOR VALUE APPLIED BETWEEN
1.18
REFADJA/REFADJB AND
AGND DECREASES V_FS
1.16
1.14
0
125 250 375 500 625 750 875 1000
FS ADJUST RESISTOR (kΩ)
Figure 6b. FS Adjustment Range vs. FS Adjustment Resistor
to save space and minimize inductance. If close place-
ment on the same side is not possible, route these
bypassing capacitors through vias to the bottom side of
the PC board.
Multilayer boards with separate ground and power
planes produce the highest level of signal integrity. Use
a split ground plane arranged to match the physical
location of the analog and output grounds on the ADC’s
package. Join the two ground planes at a single point
so the noisy output ground currents do not interfere with
the analog ground plane. Dynamic currents traveling
long distances before reaching ground cause large and
undesirable ground loops. Ground loops can degrade the
input noise by coupling back to the analog front-end of
the converter, resulting in increased spurious activity,
leading to decreased noise performance.
All AGND connections could share the same ground
plane, if the ground plane is sufficiently isolated from
any noisy, output systems ground. To minimize the cou-
pling of the output signals from the analog input, segre-
gate the output bus carefully from the analog input
circuitry. To further minimize the effects of noise cou-
pling, position ground return vias throughout the layout
to divert output switching currents away from the sensi-
tive analog sections of the ADC. This approach does
not require split ground planes, but can be accom-
plished by placing substantial ground connections
between the analog front-end and the digital outputs.
The MAX1219 is packaged in a 100-pin TQFP-EP pack-
age (package code: C100E-6), providing greater
design flexibility, increased thermal dissipation, and
optimized AC performance of the ADC. The exposed
paddle (EP) must be soldered to AGND.
The data converter die is attached to an EP lead frame
with the back of this frame exposed to the package
bottom surface, facing the PC board side of the pack-
age. This allows a solid attachment of the package to
the board with standard infrared (IR) flow soldering
techniques.
Thermal efficiency is one of the factors for selecting a
package with an exposed paddle for the MAX1219.
The exposed paddle improves thermal efficiency and
ensures a solid ground connection between the ADC
and the PC board’s analog ground layer.
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