MAX1219 Datasheet, PDF (13/21 Pages) Maxim Integrated Products – 1.8V, Dual, 12-Bit, 210Msps ADC for Broadband Applications

1.8V, Dual, 12-Bit, 210Msps ADC for
Broadband Applications
CHANNEL A
FULL SCALE = REFTA - REFBA
REFTA
REFBA
REFERENCE
BUFFER
REFERENCE-
SCALING
AMPLIFIER
G
REFA
0.1µF
MAX1219
CONTROL LINE
TO DISABLE
REFERENCE BUFFER
REFADJA*
1V
AV_CC
AV_CC / 2
CHANNEL B
FULL SCALE = REFTB - REFBB
REFTB
REFBB
REFERENCE-
SCALING
AMPLIFIER
G
REFERENCE
BUFFER
REFB
0.1µF
CONTROL LINE
TO DISABLE
REFERENCE BUFFER
REFADJB*
AV_CC
AV_CC / 2
*REFADJA/B CAN BE SHORTED TO AGND THROUGH
A 1kΩ RESISTOR OR POTENTIOMETER.
REFT_: TOP OF REFERENCE LADDER
REFB_: BOTTOM OF REFERENCE LADDER
Figure 3. Simplified Reference Architecture
Digital Outputs (DA0P/N–DA11P/N,
DB0P/N–DB11P/N, ORAP/N, ORBP/N,
DCOP/N) and Control Inputs T/BA, T/BB
Digital outputs DA0P/N–DA11P/N, DB0P/N–DB11P/N,
ORAP/N, ORBP/N, and DCOP/N are LVDS compatible,
and data on DA0P/N–DA11P/N and DB0P/N–DB11P/N
are presented in either binary or two’s-complement for-
mat (Table 1). The T/BA, T/BB control lines are LVCMOS-
compatible inputs that allow a selectable output format
for each channel. Pulling T/BA, T/BB low outputs data in
two’s complement and pulling it high presents data in
offset binary format on each of the channels’ 12-bit paral-
lel buses. T/BA, T/BB have an internal pulldown resistor
and can be left unconnected in applications using only
two’s-complement output format. All LVDS outputs pro-
vide a typical 0.371V voltage swing around roughly a
1.2V common-mode voltage, and must be terminated at
the far end of each transmission line pair (true and com-
plementary) with 100Ω. Apply a 1.71V to 1.89V voltage
supply at OV_CC to power the LVDS outputs.
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