MAX1191 Datasheet, PDF (13/27 Pages) Maxim Integrated Products – Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC

Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
Typical Operating Characteristics (continued)
(V_DD = 3.0V, OV_DD = 1.8V, V_REFIN = V_DD (internal reference), C_L ≈ 10pF at digital outputs, differential input at -0.5dB FS, f_CLK =
7.500567MHz at 50% duty cycle, T_A = +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. INPUT FREQUENCY
0.9
4.3 ^{MAX1191 toc34}
DIGITAL SUPPLY CURRENT
0.8
4.2
SUPPLY CURRENT
vs. SAMPLING RATE
7
f_IN = 2.017059MHz
6
5
A
0.7
4.1
ANALOG SUPPLY CURRENT
0.6
4.0
0.5
3.9
4
B
3
2
C
1
0.4
3.8
0
1
2
3
4
f_IN (MHz)
0
0
5
10
15
20
f_CLK (MHz)
A: ANALOG SUPPLY CURRENT (I_DD) - INTERNAL AND BUFFERED EXTERNAL
REFERENCE MODES
B: ANALOG SUPPLY CURRENT (I_DD) - UNBUFFERED EXTERNAL REFERENCE MODE
C: DIGITAL SUPPLY CURRENT (I_ODD) - ALL REFERENCE MODES
Pin Description
PIN
1
2
3, 5, 10
4
6
7
8, 9, 28
11
12
13
14
15
16
17
18
19
20
21
22
NAME
INA-
INA+
GND
CLK
INB+
INB-
V_DD
OGND
OV_DD
D7
D6
D5
D4
A/B
D3
D2
D1
D0
PD1
FUNCTION
Channel A Negative Analog Input. For single-ended operation, connect INA- to COM.
Channel A Positive Analog Input. For single-ended operation, connect signal source to INA+.
Analog Ground. Connect all GND pins together.
Converter Clock Input
Channel B Positive Analog Input. For single-ended operation, connect signal source to INB+.
Channel B Negative Analog Input. For single-ended operation, connect INB- to COM.
Converter Power Input. Connect to a 2.7V to 3.6V power supply. Bypass V_DD to GND with a
combination of a 2.2µF capacitor in parallel with a 0.1µF capacitor.
Output Driver Ground
Output Driver Power Input. Connect to a 1.8V to V_DD power supply. Bypass OV_DD to GND with a
combination of a 2.2µF capacitor in parallel with a 0.1µF capacitor.
Tri-State Digital Output. D7 is the most significant bit (MSB).
Tri-State Digital Output
Tri-State Digital Output
Tri-State Digital Output
Channel Data Indicator. This digital output indicates channel A data (A/B = 1) or channel B data
(A/B = 0) is present on the output.
Tri-State Digital Output
Tri-State Digital Output
Tri-State Digital Output
Tri-State Digital Output. D0 is the least significant bit (LSB).
Power-Down Digital Input 1. See Table 3.
______________________________________________________________________________________ 13