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MAX1191 Datasheet, PDF (11/27 Pages) Maxim Integrated Products – Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
Typical Operating Characteristics (continued)
(VDD = 3.0V, OVDD = 1.8V, VREFIN = VDD (internal reference), CL ≈ 10pF at digital outputs, differential input at -0.5dB FS, fCLK =
7.500567MHz at 50% duty cycle, TA = +25°C, unless otherwise noted.)
SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
50
fIN = 2.017059MHz
49
48
47
46
45
40
45
50
55
60
CLOCK DUTY CYCLE (%)
SIGNAL-TO-NOISE AND DISTORTION
vs. CLOCK DUTY CYCLE
50
fIN = 2.017059MHz
49
48
47
46
45
40
45
50
55
60
CLOCK DUTY CYCLE (%)
TOTAL HARMONIC DISTORTION
vs. CLOCK DUTY CYCLE
-60
-62 fIN = 2.017059MHz
-64
-66
-68
-70
-72
-74
-76
-78
-80
40
45
50
55
60
CLOCK DUTY CYCLE (%)
SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK DUTY CYCLE
80
78 fIN = 2.017059MHz
76
74
72
70
68
66
64
62
60
40
45
50
55
60
CLOCK DUTY CYCLE (%)
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