MAX11040K_1111 Datasheet, PDF (11/35 Pages) Maxim Integrated Products – 24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs

24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
Pin Description (continued)
PIN
NAME
FUNCTION
Active-Low Data Ready Output. When DRDYIN = 0, DRDYOUT outputs a logic-low to indicate the
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DRDYOUT availability of a new conversion result. DRDYOUT transitions high at the next CS falling edge or when
DRDYIN = 1. See the Multiple Device Connection section.
Active-Low Data Ready Input. A logic-high at DRDYIN causes DRDYOUT to output a logic-high. When
23
DRDYIN DRDYIN = 0, DRDYOUT outputs a logic-low when a new conversion result is available. See the Multiple
Device Connection section. Connect DRDYIN to DGND when not daisy chaining multiple devices.
Sampling Synchronization Input. The falling edge of SYNC aligns sampling and output data so that
24
SYNC
multiple devices sample simultaneously. Synchronize multiple devices running from independent crystals
by connecting DRDYOUT of the last device in the chain to the SYNC inputs of all devices in the chain.
Connect SYNC to DGND for single device operation. See the Multiple Device Connection section.
Crystal Oscillator Output. Connect a 24.576MHz external crystal or resonator between XIN and XOUT
25
XOUT when using the internal oscillator. Leave XOUT unconnected when driving with an external frequency. See
the Crystal Oscillator section.
Crystal Oscillator/Clock Input. Connect a 24.576MHz external crystal or resonator between XIN and XOUT
26
XIN when using the internal oscillator or drive XIN with an external clock and leave XOUT unconnected. See
the Crystal Oscillator section.
30
AVDD
Positive Analog Supply Voltage. Bypass to AGND with a 1μF capacitor in parallel with a 0.01μF capacitor
as close as possible to the device.
32
REF3 ADC3 Buffered Reference Voltage. Bypass with a 1μF capacitor to AGND.
33
AIN3+ Positive Analog Input Channel 3
34
AIN3- Negative Analog Input Channel 3
36
REF2 ADC2 Buffered Reference Voltage. Bypass with a 1μF capacitor to AGND.
37
AIN2+ Positive Analog Input Channel 2
38
AIN2- Negative Analog Input Channel 2
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