80220 Datasheet, PDF (54/91 Pages) LSI Computer Systems – 100BASE-TX/10BASE-T Ethernet Media Interface Adapter

80220/80221
5.14 PROGRAMMABLE LED DRIVERS
The PLED[5:0] outputs can all drive LED's tied to VCC as
shown in Figures 11-13. In addition, PLED1 and PLED0
can drive an LED tied to GND as well as VCC.
The PLED[3:0] outputs can be programmed through the
MI serial port to do 4 different functions: (1) Normal
Function (2) On, (3) Off, and (4) Blink.
PLED[3:0] can be programmed to indicate 4 different sets
of events with the LED Normal Function select bits in the
MI serial port Configuration 2 register. In addition, PLED[3:0]
can be user controlled by appropriately setting the LED
output select bits in the MI serial port Configuration 2
register.
When PLED[3:0] is programmed for its Normal function,
these outputs indicate the specific functions described in
Table 5 and determined by the LED Normal Function
select bits. When PLED[3:0] is programmed to be On, the
LED output driver go low, thus turning on the LED under
user control. When PLED[3:0] is programmed to be Off,
the LED output driver will turn off, thus turning off the LED
under user control. When PLED[3:0] is programmed to
Blink, the LED output driver will continuously blink at a rate
of 100 mS on, 100 mS off.
The On and Off functions allow the LED driver to be
controlled directly through the MI serial port to indicate any
function that is desired under external control. The Blink
function allows the same external control of the LED driver
and also offers the provision to blink the LED without the
need for any external timers.
The PLED[5:0] outputs can also drive other digital inputs.
Thus, PLED[5:0] can also be used as digital outputs whose
function can be user defined and controlled through the MI
serial port.
Note that PLED1 and PLED0 pins have both pullup and
pulldown transistors. This allows these pins to drive an
LED from VCC or to GND. When PLED0 is programmed
to be 10/100 Mbps select, two LED’s can be connected to
this pin, one to VCC to indicated 100 Mbps mode is
enabled, the other to GND to indicate 10 Mbps mode is
enabled. Similarly, when PLED1 is programmed to be a
Half/Full Duplex Mode indication, two LED’s can be con-
nected to this pin, one to VCC to indicate Full Duplex Mode
is enabled, the other to GND to indicate Half Duplex Mode
is enabled.
5.15 POWER SUPPLY DECOUPLING
There are six VCC's on the 80220/80221 (VCC[6:1]) and
six GND's (GND[6:1]).
All six VCC's should be connected together as close as
possible to the device with a large VCC plane. If the VCC's
vary in potential by even a small amount, noise and latchup
can result. The VCC's should be kept to within 50 mV of
each other.
All six GND's should also be connected together as close
as possible to the device with a large ground plane. If the
GND's vary in potential by even a small amount, noise and
latchup can result. The VCC's should be kept to within 50
mV of each other.
A 0.01-0.1µF decoupling capacitor should be connected
between each VCC/GND set as close as possible to the
device pins, preferably within 0.5". The value should be
chosen on whether the noise from VCC-GND is high or low
frequency. A conservative approach would be to use two
decoupling capacitors on each VCC/GND set, one 0.1µf
for low frequency and one 0.001µf for high frequency noise
on the power supply.
The VCC connection to the transmit transformer center tap
shown in Figures 11-13 has to be well decoupled in order
to minimize common mode noise injection from the supply
into the twisted pair cable. And is recommended that a
0.01 µF decoupling capacitor be placed between the
center tap VCC to the S004 GND plane. This decoupling
capacitor should be physically placed as close as possible
to the transformer center tap, preferably within 0.5"
The PCB layout and power supply decoupling discussed
above should provide sufficient decoupling to achieve the
following when measured at the device: (1) The resultant
AC noise voltage measured across each VCC/GND set
should be less than 100 mVpp, (2) All VCC's should be
within 50 mVpp of each other, and (3) All GND's should be
within 50 mVpp of each other.
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MD400159/E