80220 Datasheet, PDF(50/91 Page) LSI Computer Systems – 100BASE-TX/10BASE-T Ethernet Media Interface Adapter

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80220 Datasheet, PDF (50/91 Pages) LSI Computer Systems – 100BASE-TX/10BASE-T Ethernet Media Interface Adapter

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80220/80221

5.7 MII CONTROLLER INTERFACE

5.7.1 General

The MII controller interface allows the 80220/80221 to

connect to any external Ethernet controller without any

glue logic provided that the external Ethernet controller

has a MII interface that complies with IEEE 802.3, as

shown in Figures 11-12.

5.7.2 Clocks

Standard Ethernet controllers with a MII use TX_CLK to

clock data in on TXD[3:0]. TX_CLK is specified in IEEE

802.3 and on the 80220/80221 to be an output. If a

nonstandard controller or other digital device is used to

interface to the 80220/80221, there might be a need to

clock TXD[3:0] into the 80220/80221 on the edges of an

external master clock. The master clock, in this case,

would be an input to the 80220/80221. This can be done

by using OSCIN as the master clock input; since OSCIN

generates TX_CLK inside the 80220/80221, data on

TXD[3:0] can be clocked into the 80220/80221 on edges

of output clock TX_CLK or input clock OSCIN. In the case

where OSCIN is used as the input clock, a crystal is no

longer needed on OSCIN, and TX_CLK can be left open

or used for some other purpose.

5.7.3 Output Drive

The digital outputs on the 80220/80221 controller signals

meet the MII driver characteristics specified in IEEE 802.3

and shown in Figure 14 if external 24.9 ohm 1% termina-

tion resistors are added. These termination resistors are

only needed if the outputs have to drive a MII cable or other

transmission line type load, such as in the external PHY

application shown in Figure 13. If the 80220/80221 is used

in embedded applications, such as adapter cards and

switching hubs shown in Figure 11 and 12, then these

terminations resistors are not needed.

5.7.4 MII Disable

The MII outputs can be placed in the high impedance state

and inputs disabled by setting the MII disable bit in the MI

serial port Control register. When this bit is set to the

disable state, the TP outputs are also disabled and trans-

Voh

Vol

Rol min = 40 ohm

VCC

Ioh

Rol min = 40 ohm

Iol

I-V

I1, V1

I2, V2

I,V

I4, V4

I (mA)

â20

â4

V (Volts)

1.10

2.4

0.40

3.05

Figure 14. MII Output Driver Characteristics

MD400159/E

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