YMF721 Datasheet, PDF (5/41 Pages) LSI Computer Systems – FM + Wavetable Synthesizer LSI

YMF721
BLOCK DIAGRAM
ADB[7-0]
A[2-0]
/MPUCS,/OPLCS
/IOW,/IOR
RST
/RESETSEL
FSP
RXD
XI
XO
ISA BUS
Interface
Decode
Logic
Timing
Generator
UART
Register
Control
(MPU/Command
/Control)
Synthesizer
Interface
(arbitration etc.)
TEST
Logic
Micro Processor
MIDI Interpreter
Command Interpreter
SRAM
32kbit
ROM
256kbit
Wave ROM
1M byte
Wavetable
Synthesizer
OPL3
FM Synthesizer
DO3
DO1
DO2
DO0
/PDOUT
CLKO
BCO
LRO
WCO
-5-
July 10, 1997