YMF721 Datasheet, PDF (20/41 Pages) LSI Computer Systems – FM + Wavetable Synthesizer LSI

YMF721
6-6. Wavetable synthesizer register
6-6-1. Status register
Status Register (RO):
port
D7
D6
D5
D4
D3
D2
D1
D0
OPL_Base + 4
-
-
-
-
-
-
LD BUSY1
6-6-2. Data register
Data Register (R/W):
Index
D7
D6
D5
D4
D3
D2
D1
D0
00 - 01h
02h
03h
04h
LSI TEST
DEVICE ID (“0” “1” “0”)
TONE HEADER
MTYPE
Memory Address (MA21-16)
Memory Address (MA15-8)
MODE
05h
06h
08-1Fh
Memory Address(MA7-0)
Memory Data(MD7-0)
TONE NUMBER (L)
20-37h
38-4Fh
50-67h
68-7Fh
80-97h
98-AFh
B0-C7h
F-NUMBER (L)
BLOCK
PREV
TOTAL LEVEL
KEYON DAMP LFORST CH
CHORUS SEND
LFO
AR
DL
TNUM (H)
F-NUMBER (H)
LDIR
PAN POT
VIB
D1R
D2R
C8-DFh
E0-F7h
F8h
RATE INTERPOLATION
REVERB SEND
-
-
-
-
MIX CONTROL (FM-R)
RR
AM
MIX CONTROL (FM-L)
F9h
-
FAh
-
FBh
-
-
MIX CONTROL (Wave-R)
MIX CONTROL (Wave-L)
-
-
-
-
-
-
ATC
-
-
-
-
-
-
-
Default :
After initial clear, index 02h becomes 40h (Device ID) and index F8h becomes 2Dh (-15dB), and all
the other registers are cleared to "0". For the details of these registers, refer to data sheet for
YMF295(OPL4-D).
Note :
BUSY1 is a BUSY flag for Wavetable registers. Wavetable status/Data register is normally accessed
by the internal processor.
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July 10, 1997