AMIS-30624 Datasheet, PDF (50/56 Pages) AMI SEMICONDUCTOR – I2C Microstepping Motordriver

AMIS-30624
16.3.12. SetOTPParam
This command is provided to the circuit by the I²C master to program and zap the OTP data D[7:0] in OTP address OTPA[2:0].
Important: This command must be sent under a specific Vbb voltage value. See parameter VbbOTP in Table 5. This is a mandatory
condition to ensure reliable zapping.
SetOTPParam corresponds to the following I²C command frame:
SetOTPParam Command Frame
Byte Content
Structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0
Address
1
1
OTP3
OTP2
OTP1
1
Command
1
0
0
1
0
2
Data 1
1
1
1
1
1
3
Data 2
1
1
1
1
1
4
Data 3
1
1
1
1
1
5
Data 4
D[7:0]
Where:
OTPA[2:0]: OTP address
D[7:0]: Corresponding OTP data
Bit 2
OTP0
0
1
1
Bit 1
HW
0
1
1
OTPA[2:0]
Bit 0
0
0
1
1
16.3.13. SetPosition
This command is provided to the circuit by the I²C master to drive the motor to a given absolute position. See Positioning for more
details. The priority encoder table (see Priority Encoder) acknowledges the cases where a SetPosition command will be ignored.
SetPosition corresponds to the following I²C command frame:
SetPosition Command Frame
Byte Content
Structure
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0
Address
1
1
OTP3
OTP2
OTP1
1
Command
1
0
0
0
1
2
Data 1
1
1
1
1
1
3
Data 2
1
1
1
1
1
4
Data 3
Pos[15:8]
5
Data 4
Pos[7:0]
Where:
Pos [15:0] Signed 16-bit position set-point for motor.
Bit 2
OTP0
0
1
1
Bit 1
HW
1
1
1
Bit 0
0
1
1
1
16.3.14. SoftStop
This command will be internally triggered when the chip temperature rises above the thermal shutdown threshold (see Table 5 and
Section 14.2.5). It provokes an immediate deceleration to Vmin (see Minimum Velocity) followed by a stop, regardless of the position
reached. Once the motor is stopped, TagPos register is overwritten with value in ActPos register to ensure keeping the stop position.
The I²C Master for some safety reasons can also issue a SoftStop command.
SoftStop corresponds to the following I²C command frame:
Byte
0
1
Content
Address
Command
Bit 7
1
1
Bit 6
1
0
SoftStop Command Frame
Structure
Bit 5
Bit 4
Bit 3
OTP3
OTP2
OTP1
0
0
1
Bit 2
OTP0
1
Bit 1
HW
1
Bit 0
0
1
16.3.15. TestBemf
This command is provided to the circuit by the I²C master in order to output the Bemf integrator output to the SWI output of the chip.
Once activated, it can be stopped only after POR. During the Bemf observation, reading of the SWI state is internally forbidden.
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