AMIS-30624 Datasheet, PDF (32/56 Pages) AMI SEMICONDUCTOR – I2C Microstepping Motordriver

AMIS-30624
zoom over one micro-step in Figure 19 shows how the PWM circuit performs this regulation. To reduce the current ripple, a higher
PWM frequency should be selectable. The RAM register PWMfreq is used for this (Bit 6 in Data 7 of SetMotorParam).
Table 21: PWM Frequency Selection
PWMfreq
0
1
Applied PWM Frequency
22.8 kHz
45.6 kHz
14.3.3. PWM Jitter
To lower the power spectrum for the fundamental and higher harmonics of the PWM frequency, jitter can be added to the PWM clock.
The RAM register PWMJEn is used for this. (Bit 0 in Data 7 of SetMotorParam or SetStallParam).
Readout with GetFullStatus1.
Table 22: PWM Jitter Selection
PWMJEn
0
1
Status
Single PWM frequency
Added jitter to PWM frequency
14.3.4. Motor Starting Phase
At motion start, the currents in the coils are directly switched from Ihold to Irun with a new sine/cosine ratio corresponding to the first
half (or micro) step of the motion.
14.3.5. Motor Stopping Phase
At the end of the deceleration phase, the currents are maintained in the coils at their actual DC level (hence keeping the sine/cosine
ratio between coils) during the stabilization time t_stab (see Table 6). The currents are then set to the hold values, respectively, Ihold x
sin(TagPos) and Ihold x cos(TagPos) as illustrated below. A new positioning order can then be executed.
Figure 20: Motor Stopping Phase
14.3.6. Charge Pump Monitoring
If the charge pump voltage is not sufficient for driving the high side transistors (due to a failure), an internal HardStop command is
issued. This is acknowledged to the master by raising the flag <CPFail> (available with command GetFullStatus1).
In case this failure occurs while a motion is ongoing, the flag <StepLoss> is also raised.
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