AMIS-30624 Datasheet, PDF (39/56 Pages) AMI SEMICONDUCTOR – I2C Microstepping Motordriver

AMIS-30624
15.4.1. Data Validity
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW state of the data line can only change
when the clock signal on the SCL line is LOW (See Figure 25).
SDA
SCK
Data line stable Change of
-> Data valid data allowed
Figure 25: Bit Transfer on the I²C-bus
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15.4.2. START and STOP Conditions
Within the procedure of the I²C-bus, unique situations arise, which are defined as START (S) and STOP (P) conditions (See Figure 26).
A HIGH to LOW transition on the SDA line while SCK is HIGH is one such unique case. This situation indicates a START condition.
LOW to HIGH transition on the SDA line while SCK is HIGH defines a STOP condition.
START and STOP conditions are always generated by the master. The bus is considered to be busy after the START condition. The
bus is considered to be free again a certain time after the STOP condition. The bus free situation is specified as t_BUF in Table 6.
The bus stays busy if a repeated START (Sr) is generated instead of a STOP condition. In this respect, the START (S) and repeated
START (Sr) conditions are functionally identical (See Figure 27). The symbol S will be used to represent START and repeated START,
unless otherwise noted.
START
SDA
STOP
SCK
START
condition
STOP
condition
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Figure 26: START and STOP Conditions
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