LTC3819 Datasheet, PDF (9/32 Pages) Linear Technology – 2-Phase, High Efficiency, Step-Down Controller for Sun Server CPUs

LTC3819
PI FU CTIO S
SW2, SW1 (Pins 25, 34): Switch Node Connections to
Inductors. Voltage swing at these pins is from a Schottky
diode (external) voltage drop below ground to V_IN.
BOOST2, BOOST1 (Pins 26, 33): Bootstrapped Supplies
to the Topside Floating Drivers. External capacitors are con-
nected between the BOOST and SW pins, and Schottky
diodes are connected between the BOOST and INTV_CC pins.
BG2, BG1 (Pins 27, 31): High Current Gate Drives for
Bottom N-Channel MOSFETS. Voltage swing at these pins
is from ground to INTV_CC.
PGND (Pin 28): Driver Power Ground. Connect to sources
of bottom N-channel MOSFETS and the (–) terminals of C_IN.
INTV_CC (Pin 29): Output of the Internal 5V Linear Low
Dropout Regulator and the EXTV_CC Switch. The driver and
control circuits are powered from this voltage source.
Decouple to power ground with a 1µF ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7µF
additional tantalum or other low ESR capacitor.
EXTV_CC (Pin 30): External Power Input to an Internal
Switch. This switch closes and supplies INTV_CC, bypass-
ing the internal low dropout regulator whenever EXTV_CC is
higher than 4.7V. See EXTV_CC Connection in the Applica-
tions Information section. Do not exceed 7V on this pin
and ensure V_EXTVCC ≤ V_INTVCC.
V_IN (Pin 32): Main Supply Pin. Should be closely de-
coupled to the IC’s signal ground pin.
PGOOD (Pin 36): Open-Drain Logic Output. PGOOD is
pulled to ground when the voltage on the EAIN pin is not
within ±10% of its set point.
3819f
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