LTC3819 Datasheet, PDF (15/32 Pages) Linear Technology – 2-Phase, High Efficiency, Step-Down Controller for Sun Server CPUs

LTC3819
APPLICATIO S I FOR ATIO
LTC3819 is operating in continuous mode the duty factors
for the top and bottom MOSFETs of each output stage are
given by:
Main Switch Duty Cycle = ^VOUT
V_IN
Synchronous
Switch
Duty
Cycle
=
⎛
⎝⎜
V_IN
– V_OUT
V_IN
⎞
⎠⎟
The MOSFET power dissipations at maximum output
current are given by:
( ) ^PMAIN
=
V_OUT
V_IN
⎛ _IMAX ⎞ ²
⎝⎜ 2 ⎠⎟
1+ δ
R_DS(ON)
+
( ) ( )( ) ^{k V}IN
2 ⎛ _IMAX ⎞
⎝⎜ 2 ⎠⎟
C _RSS
f
( ) ^PSYNC
=
V_IN
– V_OUT
V_IN
⎛ _IMAX ⎞ ²
⎝⎜ 2 ⎠⎟
1+ δ
R_DS(ON)
where δ is the temperature dependency of R_DS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I²R losses but the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V_IN < 20V the
high current efficiency generally improves with larger
MOSFETs, while for V_IN > 20V the transition losses rapidly
increase to the point that the use of a higher R_DS(ON) device
with lower C_RSS actual provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R_DS(ON) vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C_RSS is usually specified in the
MOSFET characteristics. The constant k = 1.7 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
The Schottky diodes, D1 and D2 shown in Figure 1
conduct during the dead-time between the conduction of
the two large power MOSFETs. This helps prevent the
body diode of the bottom MOSFET from turning on,
storing charge during the dead-time, and requiring a
reverse recovery period which would reduce efficiency. A
1A to 3A Schottky (depending on output current) diode is
generally a good compromise for both regions of opera-
tion due to the relatively small average current. Larger
diodes result in additional transition losses due to their
larger junction capacitance.
C_IN and C_OUT Selection
In continuous mode, the source current of each top
N-channel MOSFET is a square wave of duty cycle V_OUT/
V_IN. A low ESR input capacitor sized for the maximum
RMS current must be used. The details of a closed form
equation can be found in Application Note 77. Figure 4
shows the input capacitor ripple current for a 2-phase
configuration with the output voltage fixed and input
voltage varied. The input ripple current is normalized
against the DC output current. The graph can be used in
place of tedious calculations. The minimum input ripple
current can be achieved when the input voltage is twice the
output voltage.
In the graph of Figure 4, the 2-phase local maximum input
RMS capacitor currents are reached when:
V_{OUT =} 2k − 1
V_IN
4
where k = 1, 2
These worst-case conditions are commonly used for
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the capacitor manufacturer if there is any
question.
3819f
15