English
Language : 

LTC3553-2_15 Datasheet, PDF (6/36 Pages) Linear Technology – Micropower USB Power Manager with Li-Ion Charger, Always-On LDO and Buck Regulator
LTC3553-2
PUSHBUTTON INTERFACE ELECTRICAL CHARACTERISTICS
The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 2).
VBAT = 3.8V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Pushbutton Timing Parameters (Note 11)
tON_PBSTATL Minimum ON Low Time to Cause
PBSTAT Low
ON Brought Low During Power-On (PON) or
Power-Up (PUP1, PUP2) States
50
ms
tON_PBSTATH Delay from ON High to PBSTAT High
Power-On (PON) State, After PBSTAT Has Been
900
μs
Low for at Least tPBSTAT_PW
tON_PUP
Minimum ON Low Time to Enter
Power-Up (PUP1 or PUP2) State
Starting in the Hard Reset (HR) or Power-Off
(POFF) States
400
ms
tON_HR
Minimum ON Low Time to Hard Reset ON Brought Low During the Power-On (PON) or
11
14
17
s
Power-Up (PUP1, PUP2) States
tPBSTAT_PW PBSTAT Minimum Pulse Width
Power-On (PON) or Power-Up (PUP1, PUP2)
40
50
ms
States
tEXTPWR
Power-Up from USB Present to
Power-Up (PUP1 or PUP2) State
Starting in the Hard Reset (HR) or Power-Off
(POFF) States
100
ms
tPON_UP
BUCK_ON High to Power-On State
Starting with BUCK_ON Low in the Power-Off
(POFF) State
900
μs
tPON_DIS_BUCK BUCK_ON Low to Buck Disabled
tPUP
Power-Up (PUP1 or PUP2) State Duration
tPDN
Power-Down (PDN1 or PDN2) State
Duration
1
μs
5
s
1
s
tPGOODH
Regulators in Regulation to PGOOD High All Enabled Regulators within PGOOD Threshold
1
1.8
ms
Voltage
tPGOODL
Regulator Out of Regulation to PGOOD Any Enabled Regulator Below PGOOD Threshold
3
μs
Low
Voltage
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3553-2E is tested under pulsed load conditions such
that TJ ≈ TA. The LTC3553-2E is guaranteed to meet specifications
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 85°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls.
The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according
to the formula: TJ = TA + (PD • θJA), where θJA (in °C/W) is the package
thermal impedance.
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 110°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
Note 4: VCC is the greater of VBUS or BAT.
Note 5: Total battery drain current represents the load a battery will see
in application due to quiescent currents drawn by the BAT pin (IBATQ)
plus any current drawn from the VOUT pin. In applications where the
buck input (BVIN pin) and LDO input (VINLDO pin) are connected to the
PowerPath output (VOUT pin), the quiescent currents on BVIN and VINLDO
must be added to IBATQ to get the actual battery drain current that will be
seen in application.
Note 6: hC/10 is expressed as a fraction of programmed full charge
current with specified PROG resistor.
Note 7: The current limit features of this part are intended to protect
the IC from short term or intermittent fault conditions. Continuous
operation above the absolute maximum specified pin current rating may
result in device degradation or failure.
Note 8: BUCK_FB High, Not Switching
Note 9: VOUT not in UVLO.
Note 10: Measured with the LDO operating in unity-gain, with its output
and feedback pins tied together.
Note 11: See the Operation section of this data sheet for detailed
explanation of the pushbutton state machine and the effects of each
state on regulator and power manager operation.
Note 12: If VBUS < VUVLO then VFWD = 0 and the forward voltage across
the ideal diode is equal to its current times RDROPOUT.
Note 13: Dropout voltage is the minimum input to output voltage
differential needed for the LDO to maintain regulation at a specified
output current. When the LDO is in dropout, its output voltage will be
equal to: VINLDO – VDROP.
Note 14: PGOOD threshold is expressed as a percentage difference from
the buck or LDO regulation voltage. The threshold is measured with the
feedback pin voltage rising.
35532f
6