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LTC3553-2_15 Datasheet, PDF (24/36 Pages) Linear Technology – Micropower USB Power Manager with Li-Ion Charger, Always-On LDO and Buck Regulator
LTC3553-2
OPERATION
supply voltages where loss of regulation or other unde-
sirable operation may occur. In applications where the
buck input is supplied from other than the VOUT pin, other
measures should be taken to ensure that the buck is not
operated outside the specified BVIN input supply range,
as operation beyond this range is not guaranteed.
LDO Regulator UVLO Considerations
The LDO regulator’s bias current is supplied via an internal
connection to the USB PowerPath VOUT pin. The VOUT UVLO
shuts down the LDO when VOUT drops below about 2.6V
in order to prevent the LDO from operating incorrectly
due to too low a bias supply voltage.
The LDO power input pin, VINLDO, can be driven with as
little as 1.65V. There is, however, no UVLO to enforce this
requirement. It is thus recommended that VINLDO be tied to
the USB PowerPath VOUT pin, to ensure proper operation.
PUSHBUTTON INTERFACE
State Diagram/Operation
Figure 5 shows the LTC3553-2 pushbutton state diagram.
The pushbutton state machine has a clock with 1.82ms
period.
Upon first application of power, VBUS or BAT, an inter-
nal power on reset (POR) signal places the pushbutton
PUP2
HR
EXTPWR OR
PB400MS
EXTPWR OR
PB400MS
5SEC
PUP1
BUCK_ON
5SEC
1SEC
POFF
UVLO AND
BUCK_ON
1SEC
UVLO OR
BUCK_ON
PON
HRST
PDN2
HRST
PDN1
HRST
POR
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Figure 5. Pushbutton State Diagram
24
circuitry into the power-down (PDN1) state. One second
after entering the PDN1 state the pushbutton circuitry will
transition into the hard reset (HR) state.
In the HR state, all supplies are disabled. The PowerPath
circuitry is placed in an ultralow quiescent state to minimize
battery drain. If no external charging supply is present
(VBUS) then the ideal diode is shut down, disconnecting
VOUT from BAT to further minimize battery drain. The ultra-
low power consumption in the HR state makes it ideal for
shipping or long term storage, minimizing battery drain.
The following events cause the state machine to transition
out of HR into the power-up (PUP1) state:
ON input low for 400ms (PB400MS)
Application of external power (EXTPWR)
Upon entering the PUP1 state, the pushbutton circuitry
will sequence up the LDO and buck regulators. The buck
regulator is enabled once the feedback voltage of the LDO
nears regulation.
The BUCK_ON input is ignored in the PUP1 state. The
state machine remains in the PUP1 state for five seconds.
During the five seconds, the application’s microprocessor,
powered by the regulators, has time to boot and assert
BUCK_ON. Five seconds after entering the PUP1 state,
the pushbutton circuitry automatically transitions into the
power-on (PON) state.
In the PON state, the buck regulator can be enabled and
shut down at any time by the BUCK_ON pin. A high on
BUCK_ON is needed to keep the buck enabled. To remain
in the PON state, the application circuit must keep the
BUCK_ON input high, else the state machine enters the
power-down (PDN2) state.
When BUCK_ON is low, or when VOUT drops to its under-
voltage lockout (VOUT UVLO) threshold, the state machine
will leave the PON state and enter the power-down (PDN2)
state. In the power-down state (PDN2), the buck regulator
is kept disabled regardless of the state of the BUCK_ON
pin. The state machine remains in the power-down state
for one second, before automatically entering the power-
off (POFF) state. This one second delay allows the buck
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