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LTC3553-2_15 Datasheet, PDF (25/36 Pages) Linear Technology – Micropower USB Power Manager with Li-Ion Charger, Always-On LDO and Buck Regulator
LTC3553-2
OPERATION
output time to power down completely before it can be
re-enabled.
The same events used to exit the hard reset (HR) state
are also used to exit the POFF state and enter the PUP2
state. The PUP2 state operates in a similar manner as the
PUP1 state previously described.
Both regulators remain powered up during the five second
power-up (PUP1 or PUP2) period, regardless of the state
of the BUCK_ON input.
In either the HR or POFF states, if the BUCK_ON pin is
driven high, the pushbutton circuitry directly enters the
PON state, without passing through the power-up (PUP1
or PUP2) states.
Starting from the HR state, bringing the BUCK_ON pin high
enables the PowerPath, if it wasn’t already enabled due
to VBUS power being available. This powers up the VOUT
pin from VBUS or BAT. When the VOUT voltage rises above
the VOUT UVLO threshold, the state machine transitions
from the HR state into the PON state. At this point both
the LDO and buck regulator will simultaneously turn on.
The hard reset (HRST) event is generated by pressing and
holding the pushbutton (ON input low) for 14 seconds. For
a valid HRST event to occur the button press must start in
the PUP1, PUP2 or PON state, but can end in any state. If
a valid HRST event is present in PON, PDN2 or POFF, then
the state machine will transition to the PDN1 state and
subsequently transition to the HR state one second later.
Debounced Pushbutton Output (PBSTAT)
In the PON, PUP1, and PUP2 states, the PBSTAT open-
drain output pin outputs a debounced version of the ON
pushbutton signal. ON must be held low for at least 50ms
for the pushbutton interface to recognize it and cause
PBSTAT to go low. PBSTAT goes high impedance when
ON goes high, except the logic enforces a minimum pulse
width of 50ms on PBSTAT.
In the HR, POFF, PDN1, and PDN2 states, PBSTAT remains
high impedance regardless of the state of ON.
Power-Up Via Pushbutton Press from Hard Reset
Figure 6 shows the LTC3553-2 powering up through ap-
plication of the external pushbutton. For this example the
pushbutton circuitry starts in the HR state with a battery
connected. Pushbutton application (ON low) for 400ms
transitions the pushbutton circuitry into the PUP1 state
and powers up the LDO followed by the buck. If BUCK_ON
goes low after the five second period the buck regulator
will be shut down.
PGOOD is asserted once all enabled regulators are within
8% of their regulation voltage for 1.8ms. The BUCK_ON
input can be driven via a μP/μC or by one of the regulator
outputs through a high impedance (100kΩ typical) to keep
the buck enabled as described above. PBSTAT does not
go low on initial pushbutton application for power-up, but
will go low with subsequent ON pushbutton applications
in the PUP1, PUP2 or PON states.
1
BAT
0
1
VBUS
0
1
ON (PB)
0
1
PBSTAT
0
1
LDO
0
1
BUCK
0
1
PGOOD
0
1
BUCK_ON
0
STATE
HR
400ms
1.8ms
PUP1
PON
35532 F06
Figure 6. Power-Up via Pushbutton Press
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