LTC3731_15 Datasheet, PDF (4/34 Pages) Linear Technology – 3-Phase, 600kHz, Synchronous Buck Switching Regulator Controller

LTC3731
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_CC = V_RUN/SS = 5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
V_RUN/SS RUN/SS Pin ON Threshold
V_RUN/SSARM RUN/SS Pin Arming Threshold
V_RUN/SS, Ramping Positive
V_RUN/SS, Ramping Positive Until Short-Circuit
Latch-Off is Armed
1
1.5
1.9
V
3.8
4.5
V
V_RUN/SSLO
I_SCL
I_SDLHO
I_SENSE
RUN/SS Pin Latch-Off Threshold
RUN/SS Discharge Current
Shutdown Latch Disable Current
SENSE Pins Source Current
V_RUN/SS, Ramping Negative
Soft-Short Condition V_EAIN = 0.375V, V_RUN/SS = 4.5V
V_EAIN = 0.375V, V_RUN/SS = 4.5V
SENSE1⁺, SENSE1^–, SENSE2⁺, SENSE2^–, SENSE3⁺,
SENSE3^– All Equal 1.2V; Current at Each Pin
3.2
V
–5
–1.5
µA
1.5
5
µA
13
20
µA
DF_MAX
TG t_R,t_F
BG t_R, t_F
TG/BG t_1D
Maximum Duty Factor
In Dropout, V_SENSEMAX ≤ 30mV
Top Gate Rise Time
Top Gate Fall Time
C_LOAD = 3300pF
C_LOAD = 3300pF
Bottom Gate Rise Time
Bottom Gate Fall Time
C_LOAD = 3300pF
C_LOAD = 3300pF
Top Gate Off to Bottom Gate On Delay All Controllers, C_LOAD = 3300pF Each Driver
Synchronous Switch-On Delay Time
95
98.5
%
30
90
ns
40
90
ns
30
90
ns
20
90
ns
50
ns
BG/TG t_2D Bottom Gate Off to Top Gate On Delay All Controllers, C_LOAD = 3300pF Each Driver
Top Switch-On Delay Time
60
ns
t_ON(MIN)
Minimum On-Time
Power Good Output Indication
Tested with a Square Wave (Note 5)
110
ns
V_PGL
PGOOD Voltage Output Low
I_PGOOD
PGOOD Output Leakage
I_PGOOD
PGOOD/PHASMD Bias I
V_PGTHNEG
V_PGTHPOS
PGOOD Trip Thresholds
V_DIFFOUT Ramping Negative
V_DIFFOUT Ramping Positive
V_PGDLY
Power Good Fault Report Delay
Oscillator and Phase-Locked Loop
I_PGOOD = 2mA, G Package
I_PGOOD = 1.6mA, UH Package
V_PGOOD = 5V, G Package
0 ≤ V_PHASMD/PG ≤ V_CC, UH Package
V_DIFFOUT with Respect to Set Output Voltage,
HGOOD Goes Low After V_UVDLY Delay
After V_EAIN is Forced Outside the PGOOD Thresholds
0.1
0.3
V
0.5
1.0
V
1
µA
–10
±3
10
µA
–7
–10
–13
%
7
10
13
%
100
150
µs
f_NOM
f_LOW
f_HIGH
V_PLLTH
R_PLLIN
I_PLLFLTR
R_RELPHS
Nominal Frequency
Lowest Frequency
Highest Frequency
PLLIN Input Threshold
PLLIN Input Resistance
Phase Detector Output Current
Sinking Capability
Sourcing Capability
Controller 2-Controller 1 Phase
Controller 3-Controller 1 Phase
V_PLLFLTR = 1.2V
V_PLLFLTR = 0V
V_PLLFLTR = 2.4V
Minimum Pulse Width > 100ns
f_PLLIN < f_OSC
f_PLLIN > f_OSC
360
400
440
kHz
190
225
260
kHz
600
680
750
kHz
1
V
50
kΩ
20
µA
20
µA
120
Deg
240
Deg
CLKOUT
Controller 1 TG to CLKOUT Phase
PHASMD = 0V
PHASMD = 5V
30
Deg
60
Deg
3731fc
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