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LTC3834-1 Datasheet, PDF (3/28 Pages) Linear Technology – 30μA IQ Synchronous Step-Down Controller
LTC3834-1
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VRUN = 5V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VLOADREG Output Voltage Load Regulation
(Note 4)
Measured in Servo Loop; I TH Voltage = 1.2V to 0.7V ●
Measured in Servo Loop; I TH Voltage = 1.2V to 2V
●
0.1
0.5
%
– 0.1 – 0.5
%
gm
Transconductance Amplifier gm
ITH = 1.2V; Sink/Source 5μA (Note 4)
0.5
mmho
IQ
Input DC Supply Current
Sleep Mode
Shutdown
(Note 5)
RUN = 5V, VFB = 0.83V (No Load)
VRUN = 0V
30
50
μA
4
10
μA
UVLO
Undervoltage Lockout
VIN Ramping Down
●
3.7
4
V
VOVL
Feedback Overvoltage Lockout
Measured at VFB Relative to Regulated VFB
8
10
12
%
ISENSE
Sense Pins Total Source Current VSENSE– = VSENSE+ = 0V
–220
μA
DFMAX
Maximum Duty Factor
In Dropout
98
99.4
%
ITRACK/SS Soft-Start Charge Current
VTRACK = 0V
0.85
1.1
1.45
μA
VRUN ON RUN Pin ON Threshold
VRUN1, VRUN2 Rising
0.5
0.7
0.9
V
VSENSE(MAX) Maximum Current Sense Threshold VFB = 0.7V, VSENSE– = 3.3V
● 85
100 115
mV
TG1, 2 tr
TG1, 2 tf
TG Transition Time:
Rise Time
Fall Time
(Note 6)
CLOAD = 3300pF
CLOAD = 3300pF
50
90
ns
50
90
ns
BG1, 2 tr
BG1, 2 tf
BG Transition Time:
Rise Time
Fall Time
(Note 6)
CLOAD = 3300pF
CLOAD = 3300pF
40
90
ns
40
80
ns
TG/BG t1D Top Gate Off to Bottom Gate On Delay CLOAD = 3300pF
Synchronous Switch-On Delay Time
70
ns
BG/TG t2D Bottom Gate Off to Top Gate On Delay CLOAD = 3300pF
Top Switch-On Delay Time
70
ns
tON(MIN)
Minimum On-Time
INTVCC Linear Regulator
VINTVCCVIN Internal VCC Voltage
VLDOVIN
INTVCC Load Regulation
Oscillator and Phase-Locked Loop
(Note 7)
8.5V < VIN < 30V
ICC = 0mA to 20mA
200
ns
5.0
5.25
5.5
V
0.2
1.0
%
fNOM
fLOW
fHIGH
fSYNCMIN
fSYNCMAX
IPLLLPF
Nominal Frequency
VPLLLPF = No Connect
Lowest Frequency
VPLLLPF = 0V
Highest Frequency
VPLLLPF = INTVCC
Minimum Synchronizable Frequency PLLIN/MODE = External Clock; VPLLLPF = 0V
Maximum Synchronizable Frequency PLLIN/MODE = External Clock; VPLLLPF = 2V
Phase Detector Output Current
Sinking Capability
Sourcing Capability
fPLLIN/MODE < fOSC
fPLLIN/MODE > fOSC
360
400
440
kHz
220 250 280
kHz
475 530 580
kHz
115 140
kHz
650 800
kHz
–5
μA
5
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to any Absolute Maximum
Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The LTC3834E-1 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with statistical
process controls. The LTC3834I-1 is guaranteed to meet performance
specifications over the –40°C to 85°C operating temperature range.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LTC3834GN-1: TJ = TA + (PD • 90°C/W)
LTC3834DHC-1: TJ = TA + (PD • 43.5°C/W)
Note 4: The LTC3834-1 is tested in a feedback loop that servos VITH to a
specified voltage and measures the resultant VFB.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 7: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current 40% of IMAX (see Minimum On-Time
Considerations in the Applications Information section).
38341f
3