LTC3834-1 Datasheet, PDF (13/28 Pages) Linear Technology – 30μA IQ Synchronous Step-Down Controller

LTC3834-1
APPLICATIO S I FOR ATIO
The MOSFET power dissipations at maximum output
current are given by:
( ) ( ) P_MAIN
=
V_OUT
V_IN
I_MAX
2
1+ δΔT
R_DS(ON) +
(
V_IN
)²
⎛
⎝⎜
I_MAX
2
⎞
⎠⎟
(R_DR
)(C_MILLER
)
•
( ) ^⎡
1
⎢
⎣
V_INTVCC
–
V_THMIN
+
1
V_THMIN
⎤
⎥
⎦
f
( ) ( ) ^P_SYNC
=
V_IN
– V_OUT
V_IN
I_MAX
2
1+ δΔT
R_DS(ON)
where δ is the temperature dependency of R_DS(ON) and
R_DR (approximately 2 ) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V_THMIN is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I²R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V_IN < 20V the
high current efficiency generally improves with larger
MOSFETs, while for V_IN > 20V the transition losses rapidly
increase to the point that the use of a higher R_DS(ON) device
with lower C_MILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1+δΔT) is generally given for a MOSFET in the
form of a normalized R_DS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diode D1 shown in Figure 8 con-
ducts during the dead-time between the conduction of the
two power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period that
could cost as much as 3% in efficiency at high V_IN. A 1A
to 3A Schottky is generally a good compromise for both
regions of operation due to the relatively small average
current. Larger diodes result in additional transition losses
due to their larger junction capacitance.
C_IN and C_OUT Selection
In continuous mode, the source current of the top MOS-
FET is a square wave of duty cycle (V_OUT)/(V_IN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
[^{( )( )}] ^CIN
Required
I_RMS
≈
I_MAX
V_IN
V_OUT
1/2
V_IN – V_OUT
This formula has a maximum at V_IN = 2V_OUT, where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. Due to the high operating frequency of the
LTC3834-1, ceramic capacitors can also be used for C_IN.
Always consult the manufacturer if there is any question.
The selection of C_OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement is
satisfied, the capacitance is adequate for filtering. The
output ripple ( V _OUT) is approximated by:
ΔV_OUT
≈
⎛
I_{RIPPLE⎝⎜}ESR
+
1
8fC_OUT
⎞
⎠⎟
where f is the operating frequency, C_OUT is the output
capacitance and I_RIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I_RIPPLE increases with input voltage.
38341f
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