LTC3834-1 Datasheet, PDF (19/28 Pages) Linear Technology – 30μA IQ Synchronous Step-Down Controller

LTC3834-1
APPLICATIO S I FOR ATIO
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3834-1 circuits: 1) IC V_IN current, 2) INTV_CC
regulator current, 3) I²R losses, 4) Topside MOSFET
transition losses.
1. The V_IN current has two components: the first is the DC
supply current given in the Electrical Characteristics
table, which excludes MOSFET driver and control cur-
rents; the second is the current drawn from the 3.3V
linear regulator output. V_IN current typically results in
a small (<0.1%) loss.
2. INTV_CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV_CC to ground. The resulting dQ/dt is a current
out of INTV_CC that is typically much larger than the
control circuit current. In continuous mode, I_GATECHG
=f(Q_T+Q_B), where Q_T and Q_B are the gate charges of the
topside and bottom side MOSFETs.
3. I²R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current flows through L and
R_SENSE, but is “chopped” between the topside MOS-
FET and the synchronous MOSFET. If the two MOS-
FETs have approximately the same R_DS(ON), then the
resistance of one MOSFET can simply be summed with
the resistances of L, R_SENSE and ESR to obtain I²R
losses. For example, if each R_DS(ON) = 30m , R _L =
50m , R _SENSE = 10m and R _ESR = 40m (sum of
both input and output capacitance losses), then the
total resistance is 130m . This results in losses rang-
ing from 3% to 13% as the output current increases
from 1A to 5A for a 5V output, or a 4% to 20% loss for
a 3.3V output. Efficiency varies as the inverse square of
V_OUT for the same external components and output
power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switch-
ing regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become significant only when operating at high
input voltages (typically 15V or greater). Transition
losses can be estimated from:
Transition Loss = (1.7) V_IN2 I_O(MAX) C_RSS f
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
losses can be minimized by making sure that C_IN has
adequate charge storage and very low ESR at the switch-
ing frequency. A 25W supply will typically require a mini-
mum of 20μF to 40μF of capacitance having a maximum
of 20m to 50m of ESR. Other losses including
Schottky conduction losses during dead-time and induc-
tor core losses generally account for less than 2% total
additional loss.
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