LTC3863 Datasheet, PDF (23/36 Pages) Linear Technology – 60V Low IQ Inverting DC/DC Controller Wide Operating VIN Range: 3.5V to 60V

LTC3863
APPLICATIONS INFORMATION
the error amplifier output drive current on ITH of 100µA.
The effect causes ITH to appear clamped in response
to a transient load current step which causes excessive
output droop.
An R_ITH greater than 20k allows ITH to swing 1.5V with
margin for temperature and part to part variation and
should never have this issue. In applications with less
severe transient load step requirements, R_ITH can safely
be set as low as 10k. We do not recommend less than
10k in any application. If R_ITH is too small then either
the operating frequency will need to be increased or the
output capacitor increased to increase the R_ITH required
to stabilize the system. We strongly recommend that any
system with an R_ITH less than 20k be experimentally veri-
fied with worst-case load steps.
Design Example
Consider an inverting converter with the following speci-
fications:
V_IN = 4.5V to 55V, V_OUT = –5V, I_OUT(MAX) = 1.8A, and
f = 320kHz (Figure 7).
The output voltage is programmed according to:
V_OUT
=
–0.8V
•
R_FB2
R_FB1
If R_FB2 is chosen to be 188k, then R_FB1 needs to be 30.1k.
The FREQ pin is tied to signal ground in order to program
the switching frequency to 350kHz. The on-time required
to generate –5V output from 55V V_IN in continuous mode
can be calculated as:
t_ON(CCM)
=
320kHz
5V + 0.5V
•(55V + 5V
+
0.5V)
=
260ns
This on-time, t_ON, is larger than LTC3863’s minimum on-
time with sufficient margin to prevent cycle skipping. Use
a lower frequency if a larger on-time margin is needed to
account for variations from minimum on-time and switch-
ing frequency. As load current decreases, the converter
will eventually start cycle skipping.
Next, set the inductor value such that the inductor ripple
current is 60% of the average inductor current at maximum
V_IN = 55V and full load = 1.8A:
L
=
0.6 •1.8A
55V² •(5V + 0.5V)
• 320kHz •(55V + 5V + 0.5V)²
≈ 13.1µH
Select a standard value of 12μH.
The resulting ripple current at minimum V_IN of 4.5V is:
∆I_L
=
12µH
•
5V •(5V + 0.5V)
320kHz •(5V + 5V
+
0.5V
)
=
0.644A
320kHz
220pF
0.1µF
15nF
10k
52.3k
0.47µF
RUN ^CAP
V_IN
PLLIN/MODE
SS
SENSE
GATE
LTC3863
ITH
FREQ
SGND
V_FBN
PGND ^VFB
16mΩ
C_IN2 +
4.7µF
100V
×2
V_IN
C_IN1 ^{4.5V TO 55V}
68µF
63V
Q1 ^D1
L1
12µH 187k
C_OUT1
33µF
16V
×2
V_OUT
–5V
C_{OUT3 1.8A}
100µF
20V
12pF 30.1k
3863 F07
C_IN1: CDE AFK686M63G24T-F
C_IN2: TDK CGA6M3X7S2A475K
C_OUT1: TDK C4532X7R1C336M
C_OUT3: PANASONIC 20SVP100M
D1: VISHAY SS8PH9-M3/87A
L1: MSS1278-123ML
Q1: VISHAY Si7469DP
Figure 7. Design Example (4.5V to 55V Input, –5V, 1.8A at 320kHz)
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3863f
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