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LTC3863 Datasheet, PDF (13/36 Pages) Linear Technology – 60V Low IQ Inverting DC/DC Controller Wide Operating VIN Range: 3.5V to 60V
LTC3863
APPLICATIONS INFORMATION
The LTC3863 is a nonsynchronous inverting, current mode,
constant frequency PWM controller. It drives an external
P-channel power MOSFET which connects to a Schottky
power diode acting as the commutating catch diode. The
input range extends from 3.5V to 60V. The output range
has no theoretical minimum or maximum, but the duty
factor and external components practically limit the out-
put to one-tenth and ten times the input voltage. Higher
output ratios can be obtained with transformers and more
efficient external components.
The LTC3863 offers a highly efficient Burst Mode operation
with 70µA quiescent current, which delivers outstanding
efficiency in light load operation. The LTC3863 is a low
pin count, robust and easy-to-use inverting power supply
solution in applications which require high efficiency and
operate with widely varying input and output voltages.
The typical application on the front page is a basic LTC3863
application circuit. The LTC3863 can sense the inductor
current through a high side series sense resistor, RSENSE,
placed between VIN and the source of the external P-channel
MOSFET. Once the required output voltage and operating
frequency have been determined, external component
selection is driven by load requirements, and begins with
the selection of inductor and RSENSE. Next, the power
MOSFET and catch diode are selected. Finally, input and
output capacitors are selected.
Output Voltage Programming
The output voltage is programmed by connecting a
feedback resistor divider from the output to the VFB pin
as shown in Figure 1. The output voltage in steady-state
operation is set by the feedback resistors according to
the equation:
VOUT
=
–0.8V
•
RFB1
RFB2
LTC3863
VFB
VFBN
RFB2
CFB2
3863 F01
RFB1
VOUT
Figure 1. Setting the Output Voltage
Great care should be taken to route the VFB and VFBN
lines away from noise sources, such as the inductor or
SW node or the GATE signal that drives the external P-
channel MOSFET.
The integrator capacitor, CFB2, should be sized to ensure
the negative sense amplifier gain rolls off and limits high
frequency gain peaking in the DC/DC control loop. The
integrator capacitor pole can be safely set to be two times
the switching frequency without affecting the DC/DC phase
margin according to the following equation. It is highly
recommended that CFB2 be used in most applications.
CFB2
=
2
•
π
•
2
1
•FREQSW
Switching Frequency and Clock Synchronization
The choice of operating frequency is a trade-off between
efficiency and component size. Lowering the operating fre-
quency improves efficiency by reducing MOSFET switching
losses but requires larger inductance and/or capacitance
to maintain low output ripple voltage. Conversely, raising
the operating frequency degrades efficiency but reduces
component size.
For more information www.linear.com/3863
3863f
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