LTC3788 Datasheet, PDF (23/32 Pages) Linear Technology – 2-Phase, Dual Output Synchronous Boost Controller

LTC3788
APPLICATIONS INFORMATION
Typically, the external clock (on PLLIN/MODE pin) input
high threshold is 1.6V, while the input low threshold is
1.2V.
Note that the LTC3788 can only be synchronized to an
external clock whose frequency is within range of the
LTC3788’s internal VCO, which is nominally 55kHz to 1MHz.
This is guaranteed to be between 75kHz and 850kHz.
Rapid phase locking can be achieved by using the FREQ pin
to set a free-running frequency near the desired synchro-
nization frequency. The VCO’s input voltage is prebiased
at a frequency corresponding to the frequency set by the
FREQ pin. Once prebiased, the PLL only needs to adjust
the frequency slightly to achieve phase lock and synchro-
nization. Although it is not required that the free-running
frequency be near external clock frequency, doing so will
prevent the operating frequency from passing through a
large range of frequencies as the PLL locks.
Table 2 summarizes the different states in which the FREQ
pin can be used.
Table 2.
FREQ PIN
0V
INTV_CC
Resistor
Any of the Above
PLLIN/MODE PIN
DC Voltage
DC Voltage
DC Voltage
External Clock
FREQUENCY
350kHz
535kHz
50kHz to 900kHz
Phase Locked to
External Clock
Minimum On-Time Considerations
Minimum on-time, t_ON(MIN), is the smallest time duration
that the LTC3788 is capable of turning on the bottom
MOSFET. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle applications may approach this minimum on-
time limit.
In forced continuous mode, if the duty cycle falls below
what can be accommodated by the minimum on-time,
the controller will begin to skip cycles but the output will
continue to be regulated. More cycles will be skipped when
V_IN increases. Once V_IN rises above V_OUT, the loop works
to keep the top MOSFET on continuously. The minimum
on-time for the LTC3788 is approximately 110ns.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the greatest improvement. Percent efficiency
can be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
1000
900
800
700
600
500
400
300
200
100
0
15 25 35 45 55 65 75 85 95 105 115 125
FREQ PIN RESISTOR (kΩ)
3788 F06
Figure 6. Relationship Between Oscillator
Frequency and Resistor Value at the FREQ Pin
3788f
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