LTC3788 Datasheet, PDF (22/32 Pages) Linear Technology – 2-Phase, Dual Output Synchronous Boost Controller

LTC3788
APPLICATIONS INFORMATION
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous conduction mode (PLLIN/MODE
= INTV_CC) at maximum V_IN.
When the voltage applied to EXTV_CC rises above 4.7V, the
V_IN LDO is turned off and the EXTV_CC LDO is enabled. The
EXTV_CC LDO remains on as long as the voltage applied to
EXTV_CC remains above 4.55V. The EXTV_CC LDO attempts
to regulate the INTV_CC voltage to 5.4V, so while EXTV_CC
is less than 5.4V, the LDO is in dropout and the INTV_CC
voltage is approximately equal to EXTV_CC. When EXTV_CC
is greater than 5.4V, up to an absolute maximum of 6V,
INTV_CC is regulated to 5.4V.
The following list summarizes possible connections for
EXTV_CC:
EXTV_CC Left Open (or Grounded). This will cause
INTV_CC to be powered from the internal 5.4V regu-
lator resulting in an efficiency penalty at high input
voltages.
EXTV_CC Connected to an External Supply. If an exter-
nal supply is available in the 5.4V to 6V range, it may
be used to power EXTV_CC providing it is compatible
with the MOSFET gate drive requirements. Ensure that
EXTV_CC < VBIAS.
Topside MOSFET Driver Supply (C_B, D_B)
External bootstrap capacitors C_B connected to the BOOST
pins supply the gate drive voltages for the topside MOS-
FETs. Capacitor C_B in the Block Diagram is charged though
external diode D_B from INTV_CC when the SW pin is low.
When one of the topside MOSFETs is to be turned on, the
driver places the C_B voltage across the gate-source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V_IN and the BOOST pin follows. With the topside MOSFET
on, the boost voltage is above the input supply: V_BOOST =
V_IN + V_INTVCC. The value of the boost capacitor C_B needs
to be 100 times that of the total input capacitance of the
topside MOSFET(s). The reverse breakdown of the external
Schottky diode must be greater than V_IN(MAX).
Fault Conditions: Overtemperature Protection
At higher temperatures, or in cases where the internal
power dissipation causes excessive self heating on-chip
(such as an INTV_CC short to ground), the overtemperature
shutdown circuitry will shut down the LTC3788. When the
junction temperature exceeds approximately 170°C, the
overtemperature circuitry disables the INTV_CC LDO, causing
the INTV_CC supply to collapse and effectively shut down
the entire LTC3788 chip. Once the junction temperature
drops back to approximately 155°C, the INTV_CC LDO turns
back on. Long term overstress (T_J > 125°C) should be
avoided as it can degrade the performance or shorten the
life of the part.
Phase-Locked Loop and Frequency Synchronization
The LTC3788 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a low pass filter
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the top MOSFET of controller 1 to be locked to
the rising edge of an external clock signal applied to the
PLLIN/MODE pin. The turn-on of controller 2’s top MOSFET
is thus 180 degrees out-of-phase with the external clock.
The phase detector is an edge-sensitive digital type that
provides zero degrees phase shift between the external
and internal oscillators. This type of phase detector does
not exhibit false lock to harmonics of the external clock.
If the external clock frequency is greater than the internal
oscillator’s frequency, f_OSC, then current is sourced continu-
ously from the phase detector output, pulling up the VCO
input. When the external clock frequency is less than f_OSC,
current is sunk continuously, pulling down the VCO input.
If the external and internal frequencies are the same but
exhibit a phase difference, the current sources turn on for
an amount of time corresponding to the phase difference.
The voltage at the VCO input is adjusted until the phase
and frequency of the internal and external oscillators are
identical. At the stable operating point, the phase detector
output is high impedance and the internal filter capacitor,
C_LP, holds the voltage at the VCO input.
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