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LTC3854_15 Datasheet, PDF (19/28 Pages) Linear Technology – Small Footprint, Wide VIN Range Synchronous Step-Down DC/DC Controller
LTC3854
APPLICATIONS INFORMATION
3) Are the SENSE– and SENSE+ leads routed together
with minimum PC trace spacing? The filter capacitor
between SENSE+ and SENSE– should be as close
as possible to the LTC3854. Ensure accurate current
sensing with Kelvin connections as shown in Figure 5.
Series resistance can be added to the SENSE lines to
increase noise rejection.
4) Does the (+) terminal of CIN connect to the drain of
the topside MOSFET(s) as closely as possible? This
capacitor provides the AC current to the MOSFET(s).
5) Is the INTVCC decoupling capacitor connected closely
between INTVCC and GND? This capacitor carries the
MOSFET driver peak currents.
6) Keep the switching node (SW), top gate node (TG),
bottom gate node (BG) and boost node (BOOST) away
from sensitive small-signal nodes, especially from the
voltage and current sensing feedback pins. All of these
nodes have very large and fast moving signals and
therefore should be kept on the “output side” (Pins
4,5,6 and 8) of the LTC3854 GND and occupy minimum
PC trace area.
SENSE+ SENSE–
CURRENT SENSE
RESISTOR
(RSENSE)
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Figure 5. Kelvin Sensing RSENSE
PC Board Layout Debugging
It is helpful to use a DC-50MHz current probe to monitor
the current in the inductor while testing the circuit. Monitor
the output switching node (SW pin) to synchronize the
oscilloscope to the internal oscillator and probe the actual
output voltage as well. Check for proper performance over
the operating voltage and current range expected in the ap-
plication. The frequency of operation should be maintained
over the input voltage range down to dropout.
The duty cycle percentage should be maintained from cycle
to cycle in a well-designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regula-
tor bandwidth optimization is not required. A 1Ω to 10Ω
boost resistor may help to improve noise immunity. This
resistor is placed between the BOOST pin and the node
formed by the cathode of the boost Schottky and the
positive terminal of the boost capacitor.
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between CIN, Schottky and the top
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground
path voltage pickup between these components and the
GND pin of the IC.
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