LTC3854_15 Datasheet, PDF (14/28 Pages) Linear Technology – Small Footprint, Wide VIN Range Synchronous Step-Down DC/DC Controller

LTC3854
APPLICATIONS INFORMATION
capacitor C_B needs to be at least 100 times that of the
total input capacitance of the topside MOSFET. The reverse
breakdown of the external Schottky diode must be greater
than V_IN(MAX). When adjusting the gate-drive level, the
final arbiter is the total input current for the regulator. If
a change is made and the input current decreases, then
the efficiency has improved. If there is no change in input
current, then there is no change in efficiency.
Undervoltage Lockout
The LTC3854 has two functions that help protect the
controller in case of undervoltage conditions. A precision
UVLO comparator constantly monitors the INTV_CC voltage
to ensure that an adequate gate-drive voltage is present.
Switching action is disabled when INTV_CC is below 3.5V.
To prevent oscillation caused by a disturbance on INTV_CC,
the UVLO comparator has 350mV of hysteresis.
Another way to detect an undervoltage condition is to
monitor the V_IN supply. The RUN/SS pin has a precision
turn-on reference of 1.2V, enabling a resistor divider to V_IN
to turn on the IC when V_IN is above the desired value.
It is recommended that the resistor divider be used if the
input voltage will be quickly cycled on and off.
C_IN Selection
In forced continuous mode, the source current of the
top N-channel MOSFET is a square wave of duty cycle
V_OUT/V_IN. To prevent large voltage transients, a low ESR
input capacitor sized for the maximum RMS current must
be used.
I_RMS
=
I_OUT
2
The maximum RMS capacitor current is:
( ) ( ) I_RMS
= ^IMAX
V_IN

V_OUT
•
V_IN − V_OUT ) ^1/2
This formula has a maximum at V_IN = 2•V_OUT, where
I_RMS = I_OUT/2.
This simple worst-case condition is commonly used for
design because even significant deviations do not offer
much relief. Note that capacitor manufacturers’ ripple
14
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. Always consult
the manufacturer if there is any question.
C_OUT Selection
The selection of C_OUT is primarily determined by the ef-
fective series resistance (ESR) to minimize voltage ripple.
The output ripple (∆V_OUT) in continuous mode is:
∆V_OUT
=
∆I_L
_ESR
+
8
•
1
f_SW •
C_OUT


Where f_SW = 400kHz, C_OUT = output capacitance and ∆I_L =
ripple current in the inductor. The output ripple is highest
at maximum input voltage since ∆I_L increases with input
voltage. Typically, once the ESR requirement for C_OUT has
been met, the RMS current rating generally far exceeds
the I_RIPPLE(P-P) requirement. With ∆I_L= 0.3I_OUT(MAX) and
allowing 2/3 of the ripple due to ESR, the output ripple
will be less than 50mV at max V_IN assuming:
C_OUT Required ESR < 2.2 R_SENSE
C_OUT
>
8f_SW
1
R_SENSE
The first condition relates to the ripple current into the
ESR of the output capacitance while the second term guar-
antees that the output capacitance does not significantly
discharge during the operating frequency period due to
ripple current. The choice of smaller output capacitance
increases the ripple voltage due to the discharging term
but can be compensated with capacitors of very low ESR
to maintain the ripple voltage at or below 50mV. The I_TH pin
OPTI-LOOP compensation components can be optimized
to provide stable, high performance transient response
regardless of the output capacitors selected. The selec-
tion of output capacitors for applications with large load
current transients is primarily determined by the voltage
tolerance specifications of the load. The resistive compo-
nent of the capacitor, ESR, multiplied by the load current
change plus any output voltage ripple must be within the
voltage tolerance of the load.
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