LTC3765_15 Datasheet, PDF (16/24 Pages) Linear Technology – Active Clamp Forward Controller and Gate Driver

LTC3765
APPLICATIONS INFORMATION
In many applications, the LTC3766 supply is initially biased
by this open-loop duty cycle ramp. The maximum duty
cycle that the LTC3765 can provide therefore dictates
whether the LTC3766 has adequate bias for start-up.
The maximum duty cycle is typically 70%; however, the
setting of the DELAY pin (t_DPG) decreases the maximum
on-time. Therefore, the maximum duty cycle during start-
up is 70%-(t_DPG • f_SW • 100%). Be sure to allow adequate
margin between this maximum duty cycle and the duty
cycle required to bias the LTC3766.
In some applications, the LTC3766 is biased from a peak
charge circuit from an auxiliary winding of the main trans-
former. This configuration is shown in Figure 6. Since
the LTC3765 open-loop start-up powers both the peak
charge circuit and the output voltage, the primary design
constraint on the soft-start capacitor value is to ensure
that the output does not overvoltage before the LTC3766
has adequate bias to take control. A good rule of thumb
is to select the soft-start capacitor so that the LTC3766
has adequate supply voltage before the output voltage has
risen to half of its regulation point.
D_{PK RPK}
•
N_A
LTC3766 V_AUX
C_PK
V_IN
••
N_P
N_S
L
SG NMOS
BODY DIODE
PG
FG NMOS
BODY DIODE
V_OUT
C_OUT
3765 F06
Figure 6. Peak Charge Circuit for Biasing the LTC3766
in a Self-Starting Application
For the peak charge circuit of Figure 6, choose the value of
C_PK based on the capacitance required to bias the LTC3766.
Then choose the auxiliary winding turns ratio N_A/N_P to give
a peak charge voltage at minimum V_IN of approximately
30% more than the required V_CC of the LTC3766.
A lower bound on the primary-side soft-start capacitor
(C_SS) value was previously calculated in the overcurrent
section to ensure that the overcurrent comparator does not
trip on start-up into a full load. The value should generally
be in the range of 10nF to 1µF. Choosing too small of a
value for C_SS could potentially charge the output voltage
too quickly at no load or cause an overcurrent trip when
starting into full load. Choosing too large a value will cre-
ate additional delay in the start-up, during which time the
linear regulator will be providing the current to switch the
primary NMOS. Extremely long start-up times should be
avoided to avoid excessive power dissipation in the linear
regulator pass device. A value of 33nF is a good starting
point for most applications.
The soft-start capacitor value should be verified by compar-
ing the time for the peak charge circuit to deliver adequate
bias to the LTC3766 to the time that the output voltage rises
to half of its regulated value. The time until the LTC3766
receives bias and takes control can be approximated by:
t_BIAS ≈ 10³ • R_EQ • C_PK • C_SS + 150µs
where R_EQ is the sum of R_PK and the series resistance
of diode D_PK.
The time for the output voltage to reach half of its regulated
value can then be estimated by the following equation,
where V_OUT is the final regulated output voltage:
( ) _tOUT
≈ 10⁴

•


C_SS2
( ) _
V_OUT / 2
2_L
• C_OUT
•
f_SW
 ^1/3

2
V_IN(MIN) • N_S / N_P


16
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