LTC3765_15 Datasheet, PDF (12/24 Pages) Linear Technology – Active Clamp Forward Controller and Gate Driver

LTC3765
APPLICATIONS INFORMATION
RUN Pin Resistor Selection
Normal operation is enabled when the voltage on the RUN
pin rises above its 1.25V threshold. As shown in Figure 3,
the RUN pin is typically used with an external resistive
divider as an accurate undervoltage lockout (UVLO) on
the V_IN supply. A 5µA current is pulled by the RUN pin
when it is below its threshold that, when combined with
the value chosen for R1, increases the UVLO hysteresis
beyond the internal minimum of 4%. When used in this
manner, the values for R1 and R2 can be calculated from
the desired rising and falling UVLO thresholds by the fol-
lowing equations:
R1=
V_IN(RISING)
–
1.042
5µA
•
V_IN(FALLING)
R2 = ^{1.2 •R1}
V_IN(FALLING) – 1.2
A 1nF capacitor in parallel with R2 is recommended to
filter out noise coupling from the high slew nodes to the
RUN pin. Be aware that the absolute maximum voltage on
the RUN pin is 12V. Therefore, the following relationship
between the maximum V_IN voltage expected and the falling
V_IN UVLO threshold must be satisfied:
V_IN(MAX) < 10 • V_IN(FALLING)
Run/Stop control can also be implemented by connect-
ing a small NMOS to the RUN pin as shown in Figure 3.
Turning on the NMOS grounds the RUN pin and prevents
the LTC3765 from running.
The RUN pin is also used to sense the input voltage for
the Direct Flux Limit. A resistive divider from V_IN must
be connected to the RUN pin for proper operation of the
Direct Flux Limit.
Linear Regulator
The linear regulator eliminates the long start-up times
associated with a conventional trickle charger by using
an external NMOS to quickly charge the capacitor con-
nected to the V_CC pin. The typical configuration for the
linear regulator is shown in Figure 4.
The NDRV pin sinks up to 1mA of current through R_NDRV
to regulate the voltage on V_CC. The minimum value of
R_NDRV can therefore be computed from:
( ) _RNDRV
>
V_{IN(MAX )}
– 8.5V
1mA
+
V_TH
where V_TH is the threshold voltage of the external NMOS.
The maximum value of the R_NDRV resistor is limited by
the 10µA bias current pulled by NDRV that is required to
power the internal linear regulator circuit. When the V_CC
supply is above a minimum voltage that is a function of
the MOSFET threshold, an internal charge pump provides
all of the NDRV bias current; however, when V_CC is below
this voltage, the charge pump is not active and the NDRV
resistor must supply this current. Thus, a maximum value
of R_NDRV for the charge pump start-up can be calculated as:
R_NDRV
<
V_IN(MIN)
– 1.6V_TH
20µA
–
1.2V
RUN
LTC3765
SGND
V_IN
R1
R2
RUN/STOP
CONTROL
(OPTIONAL)
3765 F03
Figure 3. Resistive Voltage Divider for V_IN UVLO
and Optional Run/Stop Control
V_IN
NDRV
LTC3765
V_CC
SGND
R_NDRV
C_VCC
3765 F04
Figure 4. Typical Linear Regulator Configuration
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