LTC3836_15 Datasheet, PDF (11/30 Pages) Linear Technology – Dual 2-Phase, No RSENSETM Low VIN Synchronous Controller

LTC3836
OPERATION (Refer to Functional Diagram)
When the SYNC/FCB pin is tied to a DC voltage above
0.6V or when it is clocked by an external clock source
to use the phase-locked loop (see Frequency Selection
and Phase-Locked Loop), the LTC3836 operates in PWM
pulse-skipping mode at light loads. In this mode, the
current comparator I_CMP may remain tripped for several
cycles and force the main N-channel MOSFET to stay off
for the same number of cycles. The inductor current is
not allowed to reverse, though (discontinuous operation).
This mode, like forced continuous operation, exhibits low
output ripple as well as low audio noise and reduced RF
interference. However, it provides low current efficiency
higher than forced continuous mode. During start-up or
a short-circuit condition (V_FB1 or V_FB2 ≤ 0.54V), the
LTC3836 operates in pulse-skipping mode (no cur-
rent reversal allowed), regardless of the state of the
SYNC/FCB pin.
Short-Circuit Protection
When an output is shorted to ground (V_FB < 0.12V), the
switching frequency of that controller is reduced to one-
fifth of the normal operating frequency. The other controller
maintains regulation in pulse-skipping mode.
The short-circuit threshold on V_FB2 is based on the smaller
of 0.12V and a fraction of the voltage on the TRACK/SS2
pin. This also allows V_OUT2 to start up and track V_OUT1
more easily. Note that if V_OUT1 is truly short-circuited
(V_OUT1 = V_FB1 = 0V), then the LTC3836 will try to regulate
V_OUT2 to 0V if a resistor divider on V_OUT1 is connected to
the TRACK/SS pin.
Output Overvoltage Protection
As a further protection, the overvoltage comparator (OV)
guards against transient overshoots, as well as other more
serious conditions that may overvoltage the output. When
the feedback voltage on the V_FB pin has risen 13.33% above
the reference voltage of 0.6V, the main N-channel MOSFET
is turned off and the synchronous N-channel MOSFET is
turned on until the overvoltage is cleared.
Frequency Selection and Phase-Locked Loop (PLLLPF
and SYNC/FCB Pins)
The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency opera-
tion increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3836’s controllers can
be selected using the PLLLPF pin.
If the SYNC/FCB is not being driven by an external clock
source, the PLLLPF can be floated, tied to V_IN or tied to
SGND to select 550kHz, 750kHz or 300kHz respectively.
A phase-locked loop (PLL) is available on the LTC3836
to synchronize the internal oscillator to an external clock
source that is connected to the SYNC/FCB pin. In this case,
a series RC should be connected between the PLLLPF pin
and SGND to serve as the PLL’s loop filter. The LTC3836
phase detector adjusts the voltage on the PLLLPF pin to
align the turn-on of controller 1’s top MOSFET to the ris-
ing edge of the synchronizing signal. Thus, the turn-on
of controller 2’s top MOSFET is 180 degrees out-of-phase
with the rising edge of the external clock source.
The typical capture range of the LTC3836’s phase-locked
loop is from approximately 200kHz to 1MHz, and is guar-
anteed over temperature between 250kHz and 850kHz.
In other words, the LTC3836’s PLL is guaranteed to lock
to an external clock source whose frequency is between
250kHz and 850kHz.
Dropout Operation
Each top MOSFET driver is biased from the floating boot-
strap capacitor C_B, which normally recharges during each
off cycle through an external diode when the top MOSFET
turns off. If the input voltage V_IN decreases to a voltage
close to V_OUT, the loop may enter dropout and attempt to
turn on the top MOSFET continuously. The dropout detec-
tor detects this and forces the top MOSFET off for about
200ns every fourth cycle to allow C_B to recharge.
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