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LTC3734 Datasheet, PDF (20/28 Pages) Linear Technology – Single-Phase, High Efficiency DC/DC Controller for Intel Mobile CPUs
LTC3734
APPLICATIO S I FOR ATIO
where
AVP is the slope, in mV/A
RSENSE is the current sense resistor
m is the number of phases, m = 1 for LTC3734
R3 and RAVP are defined in Figure 6
gm is the transconductance gain for the error amplifier,
it is about 4.5mmho for LTC3734.
VOUT+
R3
RAVP
VOA+
+
R2
VOA–
–
R1
OAOUT
FB –
VID
ITH
0.6V +
3735 F09
Figure 6. Simplified Schematic
Diagram for AVP Design in LTC3734
Rewriting equation (9) we can estimate the AVP resistor to
be:
RAVP
≅
35.5 •R3 •RSENSE
m• | AVP |
(10)
We also adopt the current sense resistors as part of
voltage positioning slopes. So the total load line slope is
estimated to be:
AVP ≅ –35.5 • RSENSE • R3 – RSENSE ,
m RAVP
m
if
gm
• R3
>>
VOUT
0.6V
(11)
Rewriting this equation, we can estimate the RAVP value to
be:
RAVP
≅
35.5 •R3
m• | AVP | – 1
(12)
RSENSE
Typically the calculation results based on these equations
have ±10% tolerance. So the resistor values need to be fine
tuned.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3734 circuits: 1) I2R losses, 2) Topside
MOSFET transition losses, 3) PVCC supply current and 4)
CIN loss.
1) I2R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, and current sense
resistor. In continuous mode the average output current
flows through L and RSENSE, but is “chopped” between the
topside MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then the
resistance of one MOSFET can simply be summed with the
resistances of L, RSENSE and ESR to obtain I2R losses. For
example, if each RDS(ON) = 10mΩ, RL = 10mΩ, and RSENSE
= 5mΩ, then the total resistance is 25mΩ. This results in
losses ranging from 2% to 8% as the output current
increases from 3A to 15A per output stage for a 5V output,
or a 3% to 12% loss per output stage for a 3.3V output.
3734f
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