GM71C4403C Datasheet, PDF (9/10 Pages) LG Semicon Co.,Ltd. – 1,048,576 WORDS x 4BIT CMOS DYNAMIC RAM

LG Semicon
GM71C4403C
18. Either tRCH or tRRH must be satisfied.
19. tRAS(min) = tRWD(min) + tRWL(min) + tT in Read - Modify - Write cycle.
20. tCAS(min) = tCWD(min) + tCWL(min) + tT in Read - Modify - Write cycle.
21. tOFF and tOFR are determined by the later rising edge of RAS or CAS.
22. tCSH(min) can be achieved when tRCD <= tCSH(min) - tCAS(min).
23. EDO Hi-Z control by OE or WE. OE rising edge disables data outputs. When OE goes high
during CAS high, the data will not come out until next CAS access. When WE goes low
during CAS high, the data will not come out until next CAS access.
24. tHPC(min) can be achieved during a series of EDO mode write cycles or EDO mode read
cycles. If both write and read operation are mixed in a EDO mode RAS cycle(EDO mode
mix cycle (1),(2) ) minimum value of CAS cycle (tCAS + tCP + 2tT) becomes greater than the
specified tHPC(min) value.The value of CAS cycle time of mixed EDO mode is shown in
EDO mode mix cycle (1) and (2).
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