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2032VE Datasheet, PDF (4/14 Pages) Lattice Semiconductor – 3.3V In-System Programmable High Density SuperFAST™ PLD
Specifications ispLSI 2032VE
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Time
10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
3-state levels are measured 0.5V from
steady-state active level.
GND to 3.0V
≤ 1.5 ns
Figure 2. Test Load
+ 3.3V
1.5V
R1
1.5V
See Figure 2
Device
Output
Table 2-0003/2032VE
R2
Test
Point
CL*
Output Load Conditions (see Figure 2)
TEST CONDITION
A
Active High
B
Active Low
Active High to Z
C
at VOH -0.5V
Active Low to Z
at VOL+0.5V
R1
316Ω
∞
316Ω
∞
R2
348Ω
348Ω
348Ω
348Ω
CL
35pF
35pF
35pF
5pF
316Ω
348Ω 5pF
Table 2-0004A/2032VE
*CL includes Test Fixture and Probe Capacitance.
0213A/2032VE
DC Electrical Characteristics
Over Recommended Operating Conditions
SYMBOL
PARAMETER
CONDITION
MIN. TYP.3 MAX. UNITS
VOL
Output Low Voltage
IOL= 8 mA
–
–
0.4
V
VOH
IIL
IIH
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
IIL-isp
IIL-PU
IOS1
ICC2, 4, 5
BSCAN Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Operating Power Supply Current
IOH = -4 mA
2.4
0V ≤ VIN ≤ VIL (Max.)
–
(VCC - 0.2)V ≤ VIN ≤ VCC
–
VCC ≤ VIN ≤ 5.25V
–
0V ≤ VIN ≤ VIL
–
0V ≤ VIN ≤ VIL
–
VCC= 3.3V, VOUT = 0.5V
–
VIL = 0.0V, VIH = 3.0V -300/-225 –
fTOGGLE= 1 MHz
Others
–
–
–
V
–
-10 µA
–
10
µA
–
10
µA
– -150 µA
– -150 µA
– -100 mA
80
–
mA
65
–
mA
Table 2-0007/2032VE
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems
by tester ground degradation. Characterized but not 100% tested.
2. Measured using two 16-bit counters.
3. Typical values are at VCC= 3.3V and TA= 25°C.
4. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to Power Consumption section
of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to estimate
maximum ICC .
5. Unused inputs at VIL = 0V.
4