80VA Datasheet, PDF (18/27 Pages) Lattice Semiconductor – In-System Programmable 3.3V Generic Digital CrosspointTM

Specifications ispGDX80VA
ispGDX Development System (Continued)
The GDF File
The GDF file is a simple text description of the design
function, device and pin parameters. The file has four
parts: device selection, set and constant statements, a
pin section and a connection section. A sample file looks
like this:
// 32-Bit Data 3 to 1 Mux
DESIGN
datamux;
PART ispGDX160V-7Q208;
PARAM SECURITY ON;
PARAM OPENDRAIN ON;
PARAM PULL HOLD;
// USE OPEN DRAIN
// OPTION
// USE BUS HOLD
// LATCH OPTION
SET BUS_A
SET BUS_B
SET BUS_C
SET BUS_D
[dataA31..dataA0];
[dataB31..dataB0];
[dataC31..dataC0];
[dataD31..dataD0];
INPUT BUS_A
INPUT BUS_B
INPUT BUS_C
OUTPUT BUS_D
{A31..A0};
{B31..B0};
{C31..C0};
{D31..D0};
INPUT [oe] {B37};
INPUT [clk] {B36};
INPUT [sel1]
INPUT [sel0]
{B38};
{B39};
BEGIN
BUS_D.m0 = BUS_A;
BUS_D.m1 = BUS_B;
BUS_D.m2 = BUS_C;
BUS_D.m3 = VCC;
// Default all
// outputs to VCC
BUS_D.s1 = sel1;
BUS_D.s0 = sel0;
This example shows a simple, but complete, 32-bit 3:1
MUX design. Once completed, the compiler takes over.
Powerful Syntax
Lattice’s ispGDX Design System uses simple, but power-
ful, syntax to easily define a design. The !(bang) operator
controls pin polarity and can be used in both the pin and
connection sections of the design definition. Dot exten-
sions define data inputs, select controls for the 4:1
multiplexor, and control inputs of sequential elements
and tri-state buffers. Dot extensions are .M# (MUX Input),
.S# (MUX Select), and control functions, such as .CLK,
.EN, .OE and .A (shown in adjacent table). Pin Attributes
are assigned in the pin section of the GDF as well.
SLOWSLEW selects the slow slew rate for an output
buffer. The Pull parameter can be used to select the
internal pull-up or bus hold latch. OPEN drain can be
used to select open drain operation. The COMB attribute
distinguishes the structure for bidirectional pins. If COMB
is used, the input register, or latch, of an output buffer will
be applied to bidirectional pins.
Please consult the ispGDX Development System Manual
for full details.
ispGDX GDF File Dot Extensions
Type
MUX
Input
MUX
Selection
Control
MUX
Output
Dot Ext.
Description
.M0 MUXA Data input to 4:1 MUX
.M1 MUXB Data input to 4:1 MUX
.M2 MUXC Data Input to 4:1 MUX
.M3 MUXD Data input to 4:1 MUX
.S0 MUX0 Selection input to 4:1 MUX
.S1 MUX1 Selection input to 4:1 MUX
.CLK Clock for a register
.EN Latch enable for a latch signal
.OE Output enable for 3-state output
or bidirectional signal
.CE Clock enable for register clock
.A Adjacent MUX output of an I/O cell
ispGDXV Dot Ext
BUS_D.oe = oe;
BUS_D.clk = clk;
END
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