CPC7695_12 Datasheet, PDF (17/25 Pages) IXYS Corporation – Line Card Access Switch

INTEGRATED CIRCUITS DIVISION
PRELIMINARY
CPC7695
Switches will remain in the state they were in when the
LATCH pin changes from logic 0 to logic 1 and will not
respond to changes in input as long as the latch is at
logic 1. However, neither the T_SD input nor the T_SD
output control functions are affected by the latch
function. Internal thermal shutdown control and
external “All-Off” control via T_SD is not affected by the
state of the LATCH enable input.
The rising V_DD switch lock-out release threshold is
internally set to ensure all internal logic is properly
biased and functional before accepting external switch
commands from the inputs to control the switch states.
For a falling V_DD event, the lock-out threshold is set to
assure proper logic and switch behavior up to the
moment the switches are forced off and external
inputs are suppressed.
2.4 T_SD Pin Description
The T_SD pin is a bi-directional I/O structure with an
internal pull up sourced from V_DD. As an output, this
pin indicates the status of the thermal shutdown
circuitry. Typically, during normal operation, this pin will
be pulled up to V_DD but under fault conditions that
create excess thermal loading the CPC7695 will enter
thermal shutdown and a logic low will be output.
As an input, the T_SD pin can be utilized to place the
CPC7695 into the “All-Off” state by simply pulling the
input low via an open-collector type buffer. Using a
standard output with an active logic high drive
capability will sink the pull-up current resulting in
unnecessary power consumption.
Use of a standard output buffer with an active high
drive capability will not disable the thermal shutdown
mechanism. The ability to enter thermal shutdown
during a fault condition is independent of the
connection at the T_SD input.
The CPC7695’s internal pull up has a nominal value of
16A.
2.5 Under Voltage Switch Lock Out Circuitry
2.5.1 Overview
Smart logic in the CPC7695 now provides for switch
state control during both power-up and power-loss
transitions. An internal detector is used to evaluate the
V_DD supply to determine when to de-assert the under
voltage switch lock out circuitry with a rising V_DD and
when to assert the under voltage switch lock out
circuitry with a falling V_DD. Any time unsatisfactory low
V_DD conditions exist, the lock out circuit overrides user
switch control by blocking the information at the
external input pins and conditioning internal switch
commands to the All-Off state. Upon restoration of
V_DD, the switches will remain in the All-Off state until
the LATCH input is pulled low.
To facilitate hot plug insertion and system power-up
state control, the LATCH pin has an integrated weak
pull up resistor to the V_DD power rail that will hold a
non-driven LATCH pin at a logic high state. This
enables board designers to use the CPC7695 with
FPGAs and other devices that provide high
impedance outputs during power-up and logic
configuration. The weak pull up allows a fan out of up
to 32 when the system’s LATCH control driver has a
logic low minimum sink capability of 4mA.
2.5.2 Hot-Plug and Power-Up Design Considerations
There are six possible start up scenarios that can
occur during power-up. They are:
1. All inputs defined at power-up & LATCH = 0
2. All inputs defined at power-up & LATCH = 1
3. All inputs defined at power-up & LATCH = Z
4. All inputs not defined at power-up & LATCH = 0
5. All inputs not defined at power-up & LATCH = 1
6. All inputs not defined at power-up & LATCH = Z
Under all of the start up situations listed above the
CPC7695 will hold all of it’s switches in the All-Off
state during power-up. When V_DD requirements have
been satisfied the LCAS will complete it’s start up
procedure in one of three conditions.
For start up scenario 1 the CPC7695 will transition
from the All-Off state to the state defined by the inputs
when V_DD is valid.
For start up scenarios 2, 3, 5, and 6 the CPC7695 will
power up in the All-Off state and remain there until the
LATCH pin is pulled low. This allows for an indefinite
All-Off state for boards inserted into a powered system
but are not configured for service or boards that need
to wait for other devices to be configured first.
R00F
PRELIMINARY
17