IS61WV51216ALL Datasheet, PDF (9/20 Pages) Integrated Silicon Solution, Inc – 512K x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS61WV51216ALL
IS61WV51216BLL
IS64WV51216BLL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
-8
Min. Max.
-10
Min. Max.
Unit
tRC
Read Cycle Time
8—
10 —
ns
tAA
Address Access Time
—8
— 10
ns
tOHA
Output Hold Time
2.5 —
2.5 —
ns
tACE
CE Access Time
—8
— 10
ns
tDOE
OE Access Time
— 5.5
— 6.5
ns
tHZOE⁽²⁾
OE to High-Z Output
—3
—4
ns
tLZOE⁽²⁾
OE to Low-Z Output
0—
0—
ns
tHZCE⁽²
CE to High-Z Output
03
04
ns
tLZCE⁽²⁾
CE to Low-Z Output
3—
3—
ns
tBA
LB, UB Access Time
— 5.5
— 6.5
ns
tHZB⁽²⁾
LB, UB to High-Z Output
03
03
ns
tLZB⁽²⁾
LB, UB to Low-Z Output
0—
0—
ns
tPU
Power Up Time
0—
0—
ns
tPD
Power Down Time
—8
— 10
ns
Notes:
1. Testconditionsassumesignaltransitiontimesof3nsorless,timingreferencelevelsof1.5V,inputpulselevelsof0Vto3.0Vandoutputloading
specified in Figure 1.
2. TestedwiththeloadinFigure2. Transitionismeasured±500mVfromsteady-statevoltage.
Integrated Silicon Solution, Inc. — www.issi.com
9
Rev. F
10/01/09