IS61WV51216ALL Datasheet, PDF (11/20 Pages) Integrated Silicon Solution, Inc – 512K x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS61WV51216ALL
IS61WV51216BLL
IS64WV51216BLL
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CE = OE = VIL)
ADDRESS
DOUT
t RC
t AA
t OHA
PREVIOUS DATA VALID
t OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2^(1,3) (CE and OE Controlled)
ADDRESS
OE
CE
DOUT
t LZCE
HIGH-Z
t RC
t AA
t OHA
t DOE
t LZOE
t ACE
t HZOE
t HZCE
DATA VALID
CE_RD2.eps
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
Integrated Silicon Solution, Inc. — www.issi.com
11
Rev. F
10/01/09