IS62WV12816DALL Datasheet, PDF (8/17 Pages) Integrated Silicon Solution, Inc – 128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV12816DALL/DBLL, IS65WV12816DALL/DBLL
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = Vil, CS2 = WE = Vih, UB or LB = Vil)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2^(1,3) (CS1, CS2, OE, AND UB/LB Controlled)
ADDRESS
OE
CS1
CS2
LB, UB
DOUT
tRC
tAA
tDOE
tLZOE
tACE1/tACE2
tLZCE1/
tLZCE2
tBA
tLZB
HIGH-Z
tOHA
tHZOE
tHZCS1/
tHZCS2
tHZB
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1, UB, or LB = Vil. CS2=WE=Vih.
3. Address is valid prior to or coincident with CS1 LOW transition.
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
  Rev.  A
08/16/2011