IS61WV51232ALL Datasheet, PDF (8/19 Pages) Integrated Silicon Solution, Inc – 512K x 32 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS61WV51232ALL/ALS
IS61WV51232BLL/BLS
IS64WV51232BLL/BLS
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
-8
Min. Max.
-10
Min. Max.
Unit
tRC
Read Cycle Time
8—
10 —
ns
tAA
Address Access Time
—8
— 10
ns
tOHA
Output Hold Time
2.5 —
2.5 —
ns
tACE
tDOE
tHZOE⁽²⁾
CE Access Time
OE Access Time
OE to High-Z Output
—8
— 5.5
—3
— 10
ns
— 6.5
ns
—4
ns
tLZOE⁽²⁾
tHZCE⁽²
tLZCE⁽²⁾
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
0—
03
3—
0—
ns
04
ns
3—
ns
tBA
Byte Enable to Data Valid
— 5.5
— 6.5
ns
tLZB
Byte Enable to Low-Z
0—
0—
ns
tHZB
Byte Enable to High-Z
03
03
ns
Notes:
1. Testconditionsassumesignaltransitiontimesof3nsorless,timingreferencelevelsof1.5V,inputpulselevelsof0Vto3.0Vandoutputloading
specified in Figure 1.
2. TestedwiththeloadinFigure2. Transitionismeasured±500mVfromsteady-statevoltage.
8
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00B
04/23/08