IS63LV1024_07 Datasheet, PDF (5/18 Pages) Integrated Silicon Solution, Inc – 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT

IS63LV1024
IS63LV1024L
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
tRC
tAA
tOHA
tACE
tDOE
tLZOE⁽²⁾
tHZOE⁽²⁾
tLZCE⁽²⁾
tHZCE⁽²⁾
tPU
tPD
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE to Low-Z Output
CE to High-Z Output
CE to Power Up Time
CE to Power Down Time
-8 ns
-10 ns
-12 ns
Min. Max.
Min. Max.
Min. Max.
Unit
8
—
10 —
12 —
ns
—
8
—
10
—
12
ns
2
—
2
—
2
—
ns
—
8
—
10
—
12
ns
—
4
—
5
—
6
ns
0
—
0
—
0
—
ns
0
4
0
5
0
6
ns
3
—
3
—
3
—
ns
0
4
0
5
0
6
ns
0
—
0
—
0
—
ns
—
8
—
10
—
12
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
loading specified in Figure 1.
2. Tested with the loading specified in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
ZOUT = 50 Ω
OUTPUT
50 Ω
VT = 1.5V
3.3V
317 Ω
OUTPUT
5 pF
Including
jig and
scope
351 Ω
Figure 1
Figure 2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
5
Rev. I
1/26/07