IS61QDP2B22M18A Datasheet, PDF (12/33 Pages) Integrated Silicon Solution, Inc – 1Mx36 and 2Mx18 configuration available

IS61QDP2B22M18A/A1/A2
IS61QDP2B21M36A/A1 /A2
Clock Truth Table
(Use the following table with the
Mode
Clock
K
Controls
R#
W#
Stop Clock
Stop
X
X
.)
Data In
D_B
D_B+1
Previous State
Previous State
Data Out
Q_A
Q_A+1
Previous State
Previous State
No Operation (NOP)
L→H
H
H
X
X
High-Z
High-Z
Read A
Write B
L→H
L
X
X
X
D_OUT at K# (t+2.0) D_OUT at K(t+2.5)
L→H
X
L
D_IN at K (t)
D_IN at K# (t+0.5)
X
X
Notes:
1. Internal burst counter is always fixed as two-bit.
2. X = “don’t care”; H = logic “1”; L = logic “0”.
3. A read operation is started when control signal R is active low
4. A write operation is started when control signal W is active low.
5. Before entering into stop clock, all pending read and write must be completed.
6. Consecutive read or write operations can be started only at every other K clock rising edge. If two read or write operations are issued in
consecutive K clock rising edges, the second one will be ignored.
7. If both R# and W# are active low after a NOP operation, the write operation will be ignored.
8. For timing definitions, refer to the AC Timing Characteristics table. Signals must meet AC specifications at timings indicated in parenthesis with
respect to switching clocks K, K#.
x18 Write Truth Table
(Use the following table with the Timing Reference Diagram for Truth Table.)
Operation
Write Byte 0
K (t)
L→H
K# (t+0.5)
BW₀#
L
BW₁#
H
D_B
D0-8 (t)
D_B+1
Write Byte 1
L→H
H
L
D9-17 (t)
Write All Bytes
L→H
L
L
D0-17 (t)
Abort Write
L→H
H
H
Don't Care
Write Byte 0
L→H
L
H
D0-8 (t+0.5)
Write Byte 1
L→H
H
L
D9-17 (t+0.5)
Write All Bytes
L→H
L
L
D0-17 (t+0.5)
Abort Write
L→H
H
H
Don't Care
Notes:
1. Refer to the Timing Reference Diagram for Truth Table. Cycle time starts at n and is referenced to the K clock.
2. For all cases, W# needs to be active low during the rising edge of K occurring at time t.
3. For timing definitions refer to the AC Timing Characteristics table. Signals must meet AC specifications with respect to switching clocks K and
K#.
Integrated Silicon Solution, Inc.- www.issi.com
12
Rev. B
10/02/2014