ISL6617_14 Datasheet, PDF (9/15 Pages) Intersil Corporation – PWM Doubler with Phase Shedding Function and Output Monitoring Feature

ISL6617
C. VARIOUS OPERATIONAL MODES
The ISL6617 has three distinct operating modes
depending upon the voltage level of the EN_PH_SYNC
pin. To ensure that the ISL6617 is in operation, the pin
must be above 2V. When the EN_PH_SYNC pin is set to
above 97% of V_CC, the ISL6617 will operate in
interleaving mode with a maximum extension of 70ns.
When V_CC is between 78% and 85% of V_CC, the ISL6617
operates in interleaving mode with a fixed extension of
120ns and a variable extension of up to 70ns. This
results in a minimum extension of 120ns and a max of
190ns. To enter this 2nd interleaving mode, the pin must
remain in the 78% to 85% range for at least 4 cycles.
Between 54% and 64% of V_CC, the device operates in
synchronous mode. Figures 4 and 5 show simplified
synchronous and interleaving modes’ operational
waveforms, respectively.
TABLE 1. ISL6617 OPERATIONAL MODES
MODE
MIN
TYP
MAX EXTENSION
Enable Low
0.8V
Enable High
2V
Interleaving#1 97%*VCC
VCC
0ns to 70ns
Interleaving#2 78%*VCC 81%*VCC 85%*VCC 120ns + (0ns
to 70ns)
Synchronous 54%*VCC 60%*VCC 64%*VCC 0ns to 70ns
Not Used
From 0.8V to 2V or 54% of VCC is not
recommended Region.
To transition between two different modes, the
EN_PH_SYNC pin voltage level needs to be set
accordingly. Figures 6 and 7 show an example of external
circuits for mode transition between synchronous mode
and interleaving #1 or #2 mode, respectively. The R
should be less than 50kΩ to improve transition time.
PWM
PWMA
PWMB
FIGURE 4. INTERLEAVING MODE’S OPERATIONAL
WAVEFORMS (ENx = VCC, OR 81%*VCC)
PWM
PWMA
PWMB
FIGURE 5. SYNCHRONOUS MODE’S OPERATIONAL
WAVEFORMS (EN_PH_SYNC = 60%*VCC)
40%*R
60%*R
SYNC
VCC
ISL6617
EN_PH_ SYNC
+
-
+
-
-
+
+
TTL
-
INTERLEAVING
0ns TO 70ns
4 CYCLES
INTERLEAVING
BLANKING _{+120+(0ns TO 70ns)}
SYNC
0ns TO 70ns
EN_ PH
FIGURE 6. CONFIGURATION FOR TRANSITION BETWEEN SYNCHRONOUS AND INTERLEAVING #1 MODES
9
FN7564.0
February 4, 2010